RM03 volume valid bit?

[notes at isucs1.UUCP]

Here is one possible fix for the VV problem that you mention.  I hacked
up a RM02/3 driver for V6 UNIX years ago and it seemed to work ok.
The structure for drivers in V6 and 2.8bsd are sure to be different, but
maybe you can patch in similar changes in your system.  The idea is to
specifically look at the VV flag in the interrupt routine (called "rmintr"
here) and if set, just reset the drive.  The command that discovered that the
drive was not ready will be re-executed.  I have included pertinent constants
from the driver, and the code for "rmintr".  I'd be happy to mail out the
entire driver if needed.

Jim Davis
Iowa State University
UUCP:   {umn-cs okstate csu-cs}!isucs1!davis
CSNET:  davis at iowa-state



#define RMADDR  0176700
#define NRM     2               /*  allowable # of drives for this driver  */
#define NSECS   32              /*  number of sectors per track         */
#define NTRKS   5               /*  number of tracks per cylinder       */

/*   DRIVE COMMANDS             */
#define GO      01
#define RECAL   06
#define DRVCLR  010
#define OFFSET  014
#define PRESET  020
#define PACKACK 022
#define WCOM    060
#define RCOM    070

/*  STATUS FLAGS IN "RMDS"      */
#define VV      0100            /*  valid volume on line        */
#define DRY     0200            /*  drive ready                 */
#define PIP     020000          /*  positioning in progress     */

/*  STATUS FLAGS IN "RMCS1"     */
#define TRE     040000          /*  transfer error (composite)  */
#define IE      0100            /*  interrupt enable            */

/*  ERROR FLAGS IN "RMER1"      */
#define UNS     040000          /*  drive unsafe                */
#define DTE     010000          /*  drive timing error          */
#define OPI     020000          /*  operation incomplete        */
#define DCK     0100000         /*  ECC - data check error      */
#define ECH     0100            /*  ECC - hard error            */

/*  FLAGS IN "RMCS2"            */
#define CLR     040             /* controller clear             */

/*  FLAGS IN "RMOF"             */
#define FMT32   010000          /* 16 bit /word format          */



rmintr()
{  register struct buf *bp;

   if (rmtab.d_active == 0)
        return;
   bp = rmtab.d_actf;
   rmtab.d_active = 0;

   if (RMADDR->rmcs1 & TRE) {
        /*  some kind of error - reset drive status  */
	deverror(bp, RMADDR->rmcs2, RMADDR->rmer1);

        /*  wait for all commands to complete - even non-transfer  */
        while( (RMADDR->rmds & DRY)==0);

        /*  look for VV bit clear - pack may have been changed  */
        if ( (RMADDR->rmds & VV)==0) {
                RMADDR->rmcs1 = DRVCLR|TRE|IE|GO;
                RMADDR->rmcs1 = PRESET|GO;
                RMADDR->rmof  = FMT32;
        }

        else if(RMADDR->rmer1 & (UNS|DTE|OPI)) {
                RMADDR->rmcs1 = DRVCLR|TRE|IE|GO;
                RMADDR->rmcs1 = RECAL|GO;
                rmwait();
        }
        else  RMADDR->rmcs1 = DRVCLR|TRE|IE|GO;

        if (++rmtab.d_errcnt <= 10) {
                rmstart();
                return;
        }
        bp->b_flags =| B_ERROR;
   }
   rmtab.d_errcnt = 0;
   rmtab.d_actf = bp->av_forw;
   bp->b_resid = RMADDR->rmwc;
   iodone(bp);
   rmstart();
}
/********/