3BSD/usr/doc/spice
.th
.(l C
.b "Spice VAX Version 2X.x User's Guide"
.sp 0.2i
R.Dowell, A.R.Newton, D.O.Pederson
Department of Electrical Engineering and Computer Sciences
University of California
Berkeley, Ca., 94720
.sp 0.2i
.)l
.pp
Spice is a general-purpose circuit simulation program for nonlinear dc,
nonlinear transient, and linear ac analyses. Circuits may contain resistors,
capacitors, inductors, mutual inductors, independent voltage and current
sources, four types of dependent sources, transmission lines, and the four most
common semiconductor devices: diodes, bjts, jfets, and mosfets.
.pp
Spice has built-in models for the semiconductor devices, and the user need
specify only the pertinent model parameter values. The model for the bjt is
based on the integral charge model of Gummel and Poon; however, if the Gummel-
Poon parameters are not specified, the model reduces to the simpler Ebers-Moll
model. In either case, charge storage effects, ohmic resistances, and a
current-dependent output conductance may be included. The diode model can be
used for either junction diodes or schottky barrier diodes. The jfet model is
based on the fet model of Shichman and Hodges. The model for the mosfet is
based on the Frohman-Grove model; however, channel-length modulation,
subthreshold conduction, and some short-channel effects are included.
.pp
Note that the mosfet model parameter lambda has been changed to express
channel length modulation in meters/volt in this version of spice.
.bp
.sh 1 "TYPES OF ANALYSIS"
.sp 0.2i
.sh 2 "dc analysis"
.pp
The dc analysis portion of spice determines the dc operating point of the
circuit with inductors shorted and capacitors opened. A dc analysis is
automatically performed prior to a transient analysis to determine the transient
initial conditions, and prior to an ac small-signal analysis to determine the
linearized, small-signal models for nonlinear devices. If requested, the dc
small-signal value of a transfer function (ratio of output variable to input
source), input resistance, and output resistance will also be computed as a
part of the dc solution. The dc analysis can also be used to generate dc
transfer curves: a specified independent voltage or current source is stepped
over a user-specified range and the dc output variables are stored for each
sequential source value. If requested, spice also will determine the dc
small-signal sensitivities of specified output variables with respect to circuit
parameters. The dc analysis options are specified on the .dc, .tf, .op,
and .sens control cards.
.pp
If one desires to see the small-signal models for nonlinear devices
in conjunction with a transient analysis operating point, then the '.op'
card must be provided. The dc bias conditions will be identical for each
case, but the more comprehensive operating point information is not available
to be printed when transient initial conditions are computed.
.sp 0.2i
.sh 2 "ac small-signal analysis"
.pp
The ac small-signal portion of spice computes the ac output variables as a
function of frequency. The program first computes the dc operating point of
the circuit and determines linearized, small-signal models for all of the
nonlinear devices in the circuit. The resultant linear circuit is then analyzed
over a user-specified range of frequencies. The desired output of an ac small-
signal analysis is usually a transfer function (voltage gain, transimpedance,
etc). If the circuit has only one ac input, it is convenient to set that input
to unity and zero phase, so that output variables have the same value as the
transfer function of the output variable with respect to the input.
.pp
The generation of white noise by resistors and semiconductor devices can
also be simulated with the ac small-signal portion of spice. Equivalent noise
source values are determined automatically from the small-signal operating
point of the circuit, and the contribution of each noise source is added at a
given summing point. The total output noise level and the equivalent input
noise level are determined at each frequency point. The output and input noise
levels are normalized with respect to the square root of the noise bandwidth
and have the units volts/rt hz or amps/rt hz. The output noise and equivalent
input noise can be printed or plotted in the same fashion as other output
variables. No additional input data is necessary for this analysis.
.pp
Flicker noise sources can be simulated in the noise analysis by including
values for the parameters kf and af on the appropriate device model cards.
.pp
The distortion characteristics of a circuit in the small-signal mode can
be simulated as a part of the ac small-signal analysis. The analysis is
performed assuming that one or two signal frequencies are imposed at the input.
.pp
The frequency range and the noise and distortion analysis parameters are
specified on the .ac, .noise, and .distortion control lines.
.sp 0.2i
.sh 2 "transient analysis"
.pp
The transient analysis portion of spice computes the transient output
variables as a function of time over a user-specified time interval. The
initial conditions are automatically determined by a dc analysis. All sources
which are not time dependent (for example, power supplies) are set to their dc
value. For large-signal sinusoidal simulations, a fourier analysis of the
output waveform can be specified to obtain the frequency domain fourier
coefficients. The transient time interval and the fourier analysis options are
specified on the .tran and .fourier control lines.
.sp 0.2i
.sh 2 "analysis at different temperatures"
.pp
All input data for spice is assumed to have been measured at 25 deg c
(298 deg k). The simulation also assumes a nominal temperature of 25 deg c.
The circuit can be simulated at other temperatures by using a .temp control
line.
.pp
Temperature appears explicitly in the exponential terms of the bjt and
diode model equations. In addition, saturation currents have a built-in
temperature dependence. The temperature dependence of the saturation current
in the bjt models is determined by:
.(l
js(T1) = js(T0)*((T1/T0)**pt)*exp(q*Eg*(T1-T0)/(k*T1*T0))
.)l
where k is boltzmans constant, q is the electronic charge, Eg is the energy
gap which is a model parameter, and pt is the saturation current
temperature exponent (also a model parameter, and usually equal to 3). The
temperature dependence of forward and reverse beta is according to the formula:
.(l
beta(T1)=beta(T0)*(T1/T0)**tb
.)l
where T1 and T0 are in degrees kelvin, and tb is a user-supplied model
parameter. Temperature effects on beta are carried out by appropriate
adjustment to the values of bf, jle, br, and jlc. Temperature dependence of the
saturation current in the junction diode model is determined by:
.(l
is(T1) = is(T0)*((T1/T0)**(pt/n))*exp(q*Eg*(T1-T0)/(k*n*T1*T0))
.)l
where n is the emission coefficient, which is a model parameter, and the other
symbols have the same meaning as above. Note that for schottky barrier diodes,
the value of the saturation current temperature exponent, pt, is usually 2.
.pp
Temperature appears explicitly in the value of junction potential, phi,
for all the device models. The temperature dependence is determined by:
.(l
phi(temp) = k*temp/q*log(Na*Nd/Ni(temp)**2)
.)l
where k is boltzmans constant, q is the electronic charge, Na is the acceptor
impurity density, Nd is the donor impurity density, Ni is the intrinsic
concentration, and Eg is the energy gap.
.pp
Temperature appears explicitly in the value of surface mobility, uo, for
the mosfet model. The temperature dependence is determined by:
.(l
uo(temp) = uo(tnom)/(temp/tnom)**(1.5)
.)l
.pp
The effects of temperature on resistors is modeled by the formula:
.(l
value(temp) = value(tnom)*(1+tc1*(temp-tnom)+tc2*(temp-tnom)**2))
.)l
where temp is the circuit temperature, tnom is the nominal temperature, and
tc1 and tc2 are the first- and second-order temperature coefficients.
.sp 0.5i
.sh 1 "CONVERGENCE"
.sp 0.2i
.pp
Both dc and transient solutions are obtained by an iterative process which
is terminated when both of the following conditions hold:
.sp 0.2i
.ip 1)
The nonlinear branch currents converge to within a tolerance of
0.1 percent or 1 picoamp (1.0e-12 amp), whichever is larger.
.ip 2)
The node voltages converge to within a tolerance of 0.1 percent
or 1 microvolt (1.0e-6 volt), whichever is larger.
.pp
Although the algorithm used in spice has been found to be very reliable, in
some cases it will fail to converge to a solution. When this failure occurs,
the program will print the node voltages at the last iteration and terminate
the job. In such cases, the node voltages that are printed are not necessarily
correct or even close to the correct solution.
.pp
Failure to converge in the dc analysis is usually due to an error in
specifying circuit connections, element values, or model parameter values.
Regenerative switching circuits or circuits with positive feedback probably
will not converge in the dc analysis unless the 'off' option is used for some
of the devices in the feedback path, or the .nodeset card is used to force the
circuit to converge to the desired state.
.sp 0.2i
.bp
.sh 1 "INPUT FORMAT"
.sp 0.2i
.pp
The input format for spice is of the free format type. Fields on a card
are separated by one or more blanks, a comma, an equal (=) sign, or a left or
right parenthesis; extra spaces are ignored. A card may be continued by
entering a + (plus) in column 1 of the following card; spice continues reading
beginning with column 2.
.pp
A name field must begin with a letter (a through z) and cannot contain
any delimiters. Only the first eight characters of the name are used.
.pp
A number field may be an integer field (12, -44), a floating point field
(3.14159), either an integer or floating point number followed by an integer
exponent (1e-14, 2.65e3), or either an integer or a floating point number
followed by one of the following scale factors:
.sp 0.2i
.TS
center;
l l l l l.
t=1e12 g=1e9 meg=1e6 k=1e3 mil=25.4e-6
m=1e-3 u=1e-6 n=1e-9 p=1e-12 f=1e-15
.TE
.sp 0.2i
Letters immediately following a number that are not scale factors are ignored,
and letters immediately following a scale factor are ignored. Hence, 10, 10v,
10volts, and 10hz all represent the same number, and m, ma, msec, and mmhos all
represent the same scale factor. Note that 1000, 1000.0, 1000hz, 1e3, 1.0e3,
1khz, and 1k all represent the same number.
.bp
.sh 1 "CIRCUIT DESCRIPTION"
.pp
The circuit to be analyzed is described to spice by a set of element
cards, which define the circuit topology and element values, and a set of
control cards, which define the model parameters and the run controls. The
first card in the input deck must be a title card, and the last card must be
a .end card. The order of the remaining cards is arbitrary (except, of course,
that continuation cards must immediately follow the card being continued).
.pp
Each element in the circuit is specified by an element card that contains
the element name, the circuit nodes to which the element is connected, and the
values of the parameters that determine the electrical characteristics of the
element. The first letter of the element name specifies the element type.
The format for the spice element types is given in what follows. The strings
'xxxxxxx', 'yyyyyyy', and 'zzzzzzz' denote arbitrary alphanumeric strings. For
example, a resistor name must begin with the letter r and can contain from one
to eight characters. Hence, r, r1, rse, rout, and r3ac2zy are valid resistor
names.
.pp
Data fields that are enclosed in lt and gt signs '< >' are optional. All
indicated punctuation (parentheses, equal signs, etc.) are required. With
respect to branch voltages and currents, spice uniformly uses the associated
reference convention (current flows in the direction of voltage drop).
.pp
Nodes must be nonnegative integers but need not be numbered sequentially.
The datum (ground) node must be numbered zero. The circuit cannot contain a
loop of voltage sources and/or inductors and cannot contain a cutset of current
sources and/or capacitors. Each node in the circuit must have a dc path to
ground. Every node must have at least two connections except for transmission
line nodes (to permit unterminated transmission lines) and mosfet substrate
nodes (which have two internal connections anyway).
.sh 1 "TITLE CARD, COMMENT CARDS AND .END CARD"
.sp 0.2i
.sh 2 "title card"
.sp 0.2i
.b "Examples:"
.(l
power amplifier circuit
test of CAM cell
.)l
.pp
This card must be the first card in the input deck. Its contents are
printed verbatim as the heading for each section of output.
.sh 2 ".end card"
.sp 0.2i
.b "Examples:"
.(l
.end
.)l
.pp
This card must always be the last card in the input deck. Note that the
period is an integral part of the name.
.sp 0.2i
.sh 2 "comment card"
.sp 0.2i
.b "General form:"
.(l
* <any comment>
.)l
.b "Examples:"
.(l
* rf=1k gain should be 100
* May the Force be with my circuit
.)l
.pp
The asterisk in the first column indicates that this card is a
comment card. Comment cards may be placed anywhere in the circuit description.
.bp
.sh 1 "ELEMENT CARDS"
.sp 0.2i
.sh 2 "resistors"
.sp 0.2i
.b "General form:"
.(l
rxxxxxxx n1 n2 value <tc=tc1<,tc2>>
.)l
.b "Examples:"
.(l
r1 1 2 100
rc1 12 17 1k tc=0.001,0.015
.)l
.pp
N1 and n2 are the two element nodes. Value is the resistance (in ohms)
and may be positive or negative but not zero. Tc1 and tc2 are the (optional)
temperature coefficients; if not specified, zero is assumed for both. The
value of the resistor as a function of temperature is given by:
.(l
value(temp) = value(tnom)*(1+tc1*(temp-tnom)+tc2*(temp-tnom)**2))
.)l
.sp 0.4i
.sh 2 "capacitors and inductors"
.sp 0.2i
.b "General form:"
.(l
cxxxxxxx n+ n- value <ic=incond>
lyyyyyyy n+ n- value <ic=incond>
.)l
.sp 0.2i
.b "Examples:"
.(l
cbyp 13 0 1uf
cosc 17 23 10u ic=3v
llink 42 69 1uh
lshunt 23 51 10u ic=15.7ma
.)l
.pp
N+ and n- are the positive and negative element nodes, respectively.
Value is the capacitance in farads or the inductance in henries.
.pp
For the capacitor, the (optional) initial condition is the initial
time-zero) value of capacitor voltage (in volts). For the inductor, the (option
initial condition is the initial (time-zero) value of inductor current (in
amps) that flows from n+, through the inductor, to n-. Note that the initial
conditions (if any) apply 'only' if the uic option is specified on the .tran
card.
.sh 2 "coupled (mutual) inductors"
.sp 0.2i
.b "General form:"
.(l
kxxxxxxx lyyyyyyy lzzzzzzz value
.)l
.b "Examples:"
.(l
k43 laa lbb 0.999
kxfrmr l1 l2 0.87
.)l
.pp
lyyyyyyy and lzzzzzzz are the names of the two coupled inductors, and
value is the coefficient of coupling, k, which must be greater than 0 and less
than or equal to 1. Using the 'dot' convention, place a 'dot' on the first
node of each inductor.
.sp 0.2i
.sh 2 "transmission lines (lossless)"
.sp 0.2i
.b "General form:"
.(l
txxxxxxx n1 n2 n3 n4 z0=value <td=value> <f=freq <nl=nrmlen>>
+ <ic=v1,i1,v2,i2>
.)l
.sp 0.2i
.b "Examples:"
.(l
t1 1 0 2 0 z0=50 td=10ns
.)l
.pp
N1 and n2 are the nodes at port 1; n3 and n4 are the nodes at port 2.
Z0 is the characteristic impedance. The length of the line may be expressed in
either of two forms. The transmission delay, td, may be specified directly (as
td=10ns, for example). Alternatively, a frequency f may be given, together
with nl, the normalized electrical length of the transmission line with respect
to the wavelength in the line at the frequency f. If a frequency is specified
but nl is omitted, 0.25 is assumed (that is, the frequency is assumed to be the
quarter-wave frequency). Note that although both forms for expressing the line
length are indicated as optional, one of the two must be specified.
.pp
Note that this element models only one propagating mode. If all four
nodes are distinct in the actual circuit, then two modes may be excited. To
simulate such a situation, two transmission-line elements are required. (see
the example in Appendix A for further clarification.)
.pp
The (optional) initial condition specification consists of the voltage
and current at each of the transmission line ports. Note that the initial
conditions (if any) apply 'only' if the uic option is specified on the .tran
card.
.pp
One should be aware that spice will use a transient time-step which
does not exceed 1/2 the minimum transmission line delay. Therefore very
short transmission lines (compared with the analysis time frame) will cause
long run times.
.sh 2 "linear dependent sources"
.pp
Spice allows circuits to contain linear dependent sources characterized by
any of the four equations
.sp 0.2i
i=g*v v=e*v i=f*i v=h*i
.sp 0.2i
where g, e, f, and h are constants representing transconductance, voltage gain,
current gain, and transresistance, respectively. Note: a more complete
description of dependent sources as implemented in spice is given in Appendix B.
.sp 0.2i
.sh 2 "linear voltage-controlled current sources"
.sp 0.2i
.b "General form:"
.(l
gxxxxxxx n+ n- nc+ nc- value
.)l
.sp 0.2i
.b "Examples:"
.(l
g1 2 0 5 0 0.1mmho
.)l
.pp
N+ and n- are the positive and negative nodes, respectively. Current flow
is from the positive node, through the source, to the negative node. Nc+ and
nc- are the positive and negative controlling nodes, respectively. Value is
the transconductance (in mhos).
.sp 0.2i
.sh 2 "linear voltage-controlled voltage sources"
.sp 0.2i
.b "General form:"
.(l
exxxxxxx n+ n- nc+ nc- value
.)l
.sp 0.2i
.b "Examples:"
.(l
e1 2 3 14 1 2.0
.)l
.pp
N+ is the positive node, and n- is the negative node. Nc+ and nc- are the
positive and negative controlling nodes, respectively. Value is the voltage
gain.
.sp 0.2i
.sh 2 "linear current-controlled current sources"
.sp 0.2i
.b "General form:"
.(l
fxxxxxxx n+ n- vnam value
.)l
.sp 0.2i
.b "Examples:"
.(l
f1 13 5 vsens 5
.)l
.pp
N+ and n- are the positive and negative nodes, respectively. Current flow
is from the positive node, through the source, to the negative node. Vnam is
the name of a voltage source through which the controlling current flows. The
direction of positive controlling current flow is from the positive node,
through the source, to the negative node of vnam. Value is the current gain.
.sp 0.2i
.sh 2 "linear current-controlled voltage sources"
.sp 0.2i
.b "General form:"
.(l
hxxxxxxx n+ n- vnam value
.)l
.sp 0.2i
.b "Examples:"
.(l
hx 5 17 vz 0.5k
.)l
.pp
N+ and n- are the positive and negative nodes, respectively. Vnam is the
name of a voltage source through which the controlling current flows. The
direction of positive controlling current flow is from the positive node,
through the source, to the negative node of vnam. Value is the transresistance
(in ohms).
.sh 2 "independent sources"
.sp 0.2i
.b "General form:"
.(l
vxxxxxxx n+ n- <<dc> dc/tran value> <ac <acmag <acphase>>>
.)l
iyyyyyyy n+ n- <<dc> dc/tran value> <ac <acmag <acphase>>>
.sp 0.2i
.b "Examples:"
.(l
vcc 10 0 dc 6
vin 13 2 0.001 ac 1 sin(0 1 1meg)
isrc 23 21 ac 0.333 45.0 sffm(0 1 10k 5 1k)
vmeas 12 9
.)l
.pp
N+ and n- are the positive and negative nodes, respectively. Note that
voltage sources need not be grounded. Positive current is assumed to flow from
positive node, through the source, to the negative node.
A current sources of positive value, will force current to flow out of
the n+ node, through the source, and into the n- node.
Voltage sources, in addition to being
used for circuit excitation, are the 'ammeters' for spice,
that is, zero valued voltage sources may be inserted into the circuit for the pu
of measuring current. They will, of course, have no effect on circuit
operation since they represent short-circuits.
.sp 0.2i
.pp
Dc/tran is the dc and transient analysis value of the source. If the
source value is zero both for dc and transient analyses, this value may be
omitted. If the source value is time-invariant (e.g., a power supply), then
the value may optionally be preceded by the letters dc.
.sp 0.2i
.pp
Acmag is the ac magnitude and acphase is the ac phase. The source is set
to this value in the ac analysis. If acmag is omitted following the keyword
ac, a value of unity is assumed. If acphase is omitted, a value of zero is
assumed. If the source is not an ac small-signal input, the keyword ac and the
ac values are omitted.
.sp 0.2i
.pp
Any independent source can be assigned a time-dependent value for
transient analysis. If a source is assigned adependent value, the time-
time-zero value is used for dc analysis. There are five independent source
functions: pulse, exponential, sinusoidal, piece-wise linear, and single-freque
fm. If parameters other than source values are omitted or set to zero, the
default values shown will be assumed. (tstep is the printing increment and
tstop is the final time (see the .tran card for explanation)).
.sp 0.2i
1. Pulse pulse(v1 v2 td tr tf pw per)
.sp 0.2i
.b "Examples:"
.(l
vin 3 0 pulse(-1 1 2ns 2ns 2ns 50ns 100ns)
.)l
.TS
center;
l l l.
parameters default values units
.sp 0.2i
v1 (initial value) volts or amps
v2 (pulsed value) volts or amps
td (delay time) 0.0 seconds
tr (rise time) tstep seconds
tf (fall time) tstep seconds
pw (pulse width) tstop seconds
per (period) tstop seconds
.TE
.pp
A single pulse so specified is described by the following table:
.sp 0.2i
.TS
center;
l l.
time value
.sp 0.2i
0 v1
td v1
td+tr v2
td+tr+pw v2
td+tr+pw+tf v1
tstop v1
.TE
.sp 0.1i
Intermediate points are determined by linear interpolation.
.sp 0.1i
2. Sinusoidal sin(vo va freq td theta)
.sp 0.2i
.b "Examples:"
.(l
vin 3 0 sin(0 1 100meg 1ns 1e10)
.)l
.sp 0.2i
.TS
center;
l l l.
parameters default value units
.sp 0.2i
vo (offset) volts or amps
va (amplitude) volts or amps
freq (frequency) 1/tstop hz
td (delay) 0.0 seconds
theta (damping factor) 0.0 1/seconds
.TE
.pp
The shape of the waveform is described by the following table:
.TS
center;
l l.
.sp 0.2i
time value
.sp 0.2i
0 to td vo
td to tstop vo + va*exp(-(time-td)*theta)*sine(twopi*freq*(time-td))
.TE
.sp 0.2i
.bp
3. Exponential exp(v1 v2 td1 tau1 td2 tau2)
.sp 0.2i
.b "Examples:"
.(l
vin 3 0 exp(-4 -1 2ns 30ns 60ns 40ns)
.)l
.sp 0.2i
.TS
center;
l l.
parameters default values units
.sp 0.2i
v1 (initial value) volts or amps
v2 (pulsed value) volts or amps
td1 (rise delay time) 0.0 seconds
tau1 (rise time constant) tstep seconds
td2 (fall delay time) td1+tstep seconds
tau2 (fall time constant) tstep seconds
.TE
.pp
The shape of the waveform is described by the following table:
.sp 0.2i
.TS
center;
l l.
time value
.sp 0.2i
0 to td1 v1
td1 to td2 v1+(v2-v1)*(1-exp(-(time-td1)/tau1))
td2 to tstop v1+(v2-v1)*(1-exp(-(time-td1)/tau1))
+(v1-v2)*(1-exp(-(time-td2)/tau2))
.TE
.sp 0.2i
4. Piece-wise linear
.sp 0.2i
pwl(t1 v1 <t2 v2 t3 v3 t4 v4 ...>)
.sp 0.2i
.b "Examples:"
.(l
vclock 7 5 pwl(0 -7 10ns -7 11ns -3 17ns -3 18ns -7 50ns -7)
.)l
.sp 0.2i
.TS
center;
l l.
parameters default values
.TE
.(l
Each pair of values (ti, vi) specifies that the value of the source is vi
(in volts or amps) at time=ti. The value of the source at intermediate values
of time is determined by using linear interpolation on the input values.
.)l
.sp 0.2i
.bp
5. Single-frequency fm
.sp 0.2i
sffm(vo va fc mdi fs)
.sp 0.2i
.b "Examples:"
.(l
v1 12 0 sffm(0 1m 20k 5 1k)
.)l
.sp 0.2i
.TS
center;
l l l.
parameters default values units
.sp 0.2i
vo (offset) volts or amps
va (amplitude) volts or amps
fc (carrier frequency) 1/tstop hz
mdi (modulation index)
fs (signal frequency) 1/tstop hz
.TE
.pp
The shape of the waveform is described by the following equation:
.(l
value = vo + va*sine((twopi*fc*time) + mdi*sine(twopi*fs*time))
.)l
.bp
.sh 1 "SEMICONDUCTOR DEVICES"
.pp
The elements that have been described to this point typically require only
a few parameter values to specify completely the electrical characteristics of
the element. However, the models for the four semiconductor devices that are
included in the spice program require many parameter values. Moreover, many
devices in a circuit often are defined by the same set of device model
parameters. For these reasons, a set of device model parameters is defined on a
separate .model card and assigned a unique model name. The device element
cards in spice then reference the model name. This scheme alleviates the need
to specify all of the model parameters on each device element card.
.pp
Each device element card contains the device name, the nodes to which the
device is connected, and the device model name. In addition, two optional
parameters may be specified for each device: an area factor, and an initial
condition.
.pp
The area factor determines the number of equivalent parallel devices of a
specified model. The affected parameters are marked with an asterisk under the
heading 'area' in the model descriptions below.
.pp
Two different forms of initial conditions may be specified for devices.
The first form is included to improve the dc convergence for circuits that
contain more than one stable state. If a device is specified off, the dc
operating point is determined with the terminal voltages for that device set to
zero. After convergence is obtained, the program continues to iterate to
obtain the exact value for the terminal voltages. If a circuit has more than
one dc stable state, the off option can be used to force the solution to
correspond to a desired state. If a device is specified off when in reality
the device is conducting, the program will still obtain the correct solution
(assuming the solutions converge) but more iterations will be required since
the program must independently converge to two separate solutions.
The .nodeset card serves a similar purpose as the 'off' option. The .nodeset
option is easier to apply and is the preferred means to aid convergence.
.pp
The second form of initial conditions are specified for use with
the transient analysis. These are true 'initial conditions' as opposed
to the convergence aids above. See the description of the .ic card and
the .tran card for a detailed explanation of initial conditions.
.sh 2 "junction diodes"
.sp 0.2i
.b "General form:"
.(l
dxxxxxxx n+ n- mname <area> <off> <ic=vd>
.)l
.sp 0.2i
.b "Examples:"
.(l
dbridge 2 10 diode1
dclmp 3 7 dmod 3.0 ic=0.2
.)l
.pp
N+ and n- are the positive and negative nodes, respectively. Mname is the
model name, area is the area factor, and off indicates an (optional) starting
condition on the device for dc analysis. If the area factor is omitted, a
value of 1.0 is assumed. The (optional) initial condition specification using
ic=vd is intended for use with the uic option on the .tran card, when a
transient analysis is desired starting from other than the quiescent operating
point.
.sp 0.2i
.sh 2 "bipolar junction transistors (bjt's)"
.sp 0.2i
.b "General form:"
.(l
qxxxxxxx nc nb ne <ns> mname <area> <off> <ic=vbe,vce>
.)l
.sp 0.2i
.b "Examples:"
.(l
q23 10 24 13 qmod ic=0.6,5.0
q50a 11 26 4 20 mod1
.)l
.pp
Nc, nb, and ne are the collector, base, and emitter nodes, respectively.
Ns is the (optional) substrate node. If unspecified, ground is used.
mname is the model name, area is the area factor, and off indicates an
(optional) initial condition on the device for the dc analysis. If the area
factor is omitted, a value of 1.0 is assumed. The (optional) initial condition
specification using ic=vbe,vce is intended for use with the uic option on
the .tran card, when a transient analysis is desired starting from other than th
quiescent operating point. See the '.ic' card description for a better way to
set transient initial conditions.
.sp 0.2i
.sh 2 "junction field-effect transistors (jfet's)"
.sp 0.2i
.b "General form:"
.(l
jxxxxxxx nd ng ns mname <area> <off> <ic=vds,vgs>
.)l
.sp 0.2i
.b "Examples:"
.(l
j1 7 2 3 jm1 off
.)l
.pp
Nd, ng, and ns are the drain, gate, and source nodes, respectively. Mname
is the model name, area is the area factor, and off indicates an (optional)
initial condition on the device for dc analysis. If the area factor is
omitted, a value of 1.0 is assumed. The (optional) initial condition specification,
using ic=vds,vgs is intended for use with the uic option on the .tran card,
when a transient analysis is desired starting from other than the quiescent
operating point (see the .ic card for a better way to set initial conditions).
.sp 0.2i
.sh 2 "mosfets"
.sp 0.2i
.b "General form:"
.(l
mxxxxxxx nd ng ns nb mname <l=val> <w=val> <ad=val> <as=val>
+ <rd=val> <rs=val> <off> <ic=vds,vgs,vbs>
.)l
.sp 0.2i
.b "Examples:"
.(l
m1 24 2 0 20 type1
m31 2 17 6 10 modm l=5u w=2u
m31 2 16 6 10 modm 5u 2u
m1 2 9 3 0 mod1 l=10u w=5u ad=2p as=2p
m1 2 9 3 0 mod1 10u 5u 2p 2p
.)l
Nd, ng, ns, and nb are the drain, gate, source, and bulk (substrate)
nodes, respectively. Mname is the model name. L and w are the channel length
and width, in meters. Ad and as are the areas of the drain and source
diffusions, in sq-meters. Note that the suffix 'u' specifies microns (10**-6 m)
and 'p' sq-microns (10**-12 sq-m). If any of l, w, ad, or as are not specified,
default values are used. The user may specify the values to be used for
these default parameters on the .option card. The use of defaults simplifies
input deck preparation, as well as the editing required if devices geometries
are to be changed. Off indicates an (optional) initial condition
on the device for dc analysis. The (optional) initial condition
specification using ic=vds,vgs,vbs is intended for use with the uic option
on the .tran card, when a transient analysis is desired starting from other
than the quiescent operating point. See the .ic card for a better and
more convenient way to specify transient initial conditions.
.bp
.sp 0.2i
.sh 2 ".model card"
.sp 0.2i
.b "General form:"
.(l
.model mname type(pname1=pval1 pname2=pval2 ... )
.)l
.sp 0.2i
.b "Examples:"
.(l
.model mod1 npn bf=50 js=1e-13 vbf=50
.)l
.pp
The .model card specifies a set of model parameters that will be used by
one or more devices. Mname is the model name, and type is one of the following
seven types:
.TS
center;
l l.
npn npn bjt model
pnp pnp bjt model
d diode model
njf n-channel jfet model
pjf p-channel jfet model
nmos n-channel mosfet model
pmos p-channel mosfet model
.TE
.pp
Parameter values are defined by appending the parameter name, as given
below for each model type, followed by an equal sign and the parameter value.
Model parameters that are not given a value are assigned the default values
given below for each model type.
.sp 0.2i
.sh 2 "diode model"
.pp
The dc characteristics of the diode are determined by the parameters is
and n. An ohmic resistance, rs, is included. Charge storage effects are
modeled by a transit time, tt, and a nonlinear depletion layer capacitance
which is determined by the parameters cjo, pb, and m. The temperature
dependence of the saturation current is defined by the parameters eg, the energy
and pt, the saturation current temperature exponent. Reverse breakdown is
modeled by an exponential increase in the reverse diode current and is
determined by the parameters bv and ibv (both of which are positive numbers).
.sp 0.2i
.TS
center;
l l l l l l.
area name parameter default example
.sp 0.2i
1 * is saturation current 1.0e-14 1.0e-14
2 * rs ohmic resistance 0 10
3 n emission coefficient 1 1.0
4 tt transit-time 0 0.1ns
5 * cjo zero-bias junction capacitance 0 2pf
6 pb junction potential 1 0.6
7 m grading coefficient 0.5 0.5
8 eg activation energy 1.11 1.11 si
0.69 sbd
0.67 ge
9 pt saturation-current temp. exp 3.0 3.0 jn
2.0 sbd
10 kf flicker noise coefficient 0
11 af flicker noise exponent 1
12 fc coefficient for forward-bias 0.5
depletion capacitance formula
13 bv reverse breakdown voltage infinite 40.0
14 ibv current at breakdown voltage 1.0e-3
.TE
.sh 2 "bjt models (both npn and pnp)"
.pp
The bipolar junction transistor model in spice is an adaptation of
the integral charge control model of Gummel and Poon. This modified
Gummel-Poon model extends the original model to include several effects
at high bias levels. The model will automatically simplify to the simpler
Ebers-Moll model when certain parameters are not specified. To permit
one to use model parameters from earlier versions of spice, many
of the model parameters can be called by two names. The parameter names
used in the modified Gummel-Poon model have been chosen to be more easily
understood by the program user, and to better reflect both physical and
circuit design thinking. The dc model is defined by the parameters bf,
jbf, jle, and nle which determine the forward current gain characteristics,
br, jbr, jlc, and nlc which determine the reverse current gain characteristics,
vbf and vbr, which determine the output conductance for forward and reverse
regions, and the saturation current, js. Three ohmic resistances rb, rc, and
re are included, where rb can be high current dependent. Base charge storage
is modeled by forward and reverse transit times, tf and tr the forward transit
time being bias dependent if desired, and nonlinear depletion layer
capacitances which are determined by cje, vje, and mje for the b-e junction and
cjc, vjc, and mjc for the b-c junction. A depletion formulation is used for
the substrate capacitance described by cjs, vjs, and mjs. The temperature
dependence of saturation current, js, is determined by the energy-gap, eg,
and the saturation current temperature exponent, pt. Base current temperature
dependence is modeled by the temperature exponent for beta, tb.
.sp 0.2i
.TS
center;
l l l l.
name parameter units default
.sp 0.2i
js transport saturation current amps 1.0e-16
bf ideal maximum forward beta amp/amp 100
nf forward current emission coefficient - 1.0
vbf forward early voltage volts infinite
jbf corner for forward beta high current roll-off amps infinite
jle base-emitter leakage saturation current amps 0
nle base-emitter leakage emission coefficient - 1.5
br ideal maximum reverse beta amp/amp 1.0
nr reverse current emission coefficient - 1.0
vbr reverse early voltage volts infinite
jbr corner for reverse beta high current roll-off amps infinite
jlc base-collector leakage saturation current amps 0
nlc base-collector leakage emission coefficient - 2.0
rb zero bias base resistance ohms 0
jrb current where base resistance falls halfway to amps infinite
its minimum value
rbm minimum base resistance at high currents ohms rb
re emitter resistance ohms 0
rc collector resistance ohms 0
cje base-emitter zero bias depletion capacitance farads 0
vje base-emitter built-in potential volts .75
mje base-emitter junction exponential factor - .33
tf ideal forward transit time sec 0
xtf coefficient for bias dependence of tf - 0
vtf voltage describing vbc dependence of tf volts infinite
jtf high-current parameter for effect on tf amps 0
ptf excess phase at freq=1.0/(tf*2pi) hz degrees 0
cjc base-collector zero bias depletion capacitance farads 0
vjc base-collector built-in potential volts .75
mjc base-collector junction exponential factor - .33
cdis fraction of base-collector depletion - 1.0
capacitance connected to internal base node
tr ideal reverse transit time sec 0
cjs zero bias substrate capacitance farads 0
vjs substrate junction built-in potential volts .75
mjs substrate junction exponential factor - 0
tb forward and reverse beta temperature exponent - 0
eg energy-gap for temperature effect on js ev 1.11
pt temperature exponent for effect on js - 3
kf flicker-noise coefficient - 0
af flicker-noise exponent - 1
fc coefficient for forward-bias depletion - .5
capacitance formula
.TE
.sp 0.2i
.sh 2 "jfet models (both n and p channel)"
.sp 0.2i
.pp
The jfet model is derived from the fet model of Shichman and Hodges. The
dc characteristics are defined by the parameters vto and beta, which determine
the variation of drain current with gate voltage, lambda, which determines the
output conductance, and is, the saturation current of the two gate junctions.
Two ohmic resistances, rd and rs, are included. Charge storage is modeled by
nonlinear depletion layer capacitances for both gate junctions which vary as
the -1/2 power of junction voltage and are defined by the parameters cgs, cgd,
and pb.
.sp 0.2i
.TS
center;
l l l l l l.
area name parameter default example
.sp 0.2i
1 vto threshold voltage -2.0 -2.0
2 * beta transconductance parameter 1.0e-4 1.0e-3
3 lambda channel length modulation parameter 0 1.0e-4
4 * rd drain ohmic resistance 0 100
5 * rs source ohmic resistance 0 100
6 * cgs zero-bias g-s junction capacitance 0 5pf
7 * cgd zero-bias g-d junction capacitance 0 1pf
8 pb gate junction potential 1 0.6
9 * is gate junction saturation current 1.0e-14 1.0e-14
10 kf flicker noise coefficient 0
11 af flicker noise exponent 1
12 fc coefficient for forward-bias 0.5
depletion capacitance formula
.TE
.sp 0.2i
.sh 2 "mosfet models (both n and p channel)"
.sp 0.2i
The dc mosfet equations
are determined by the parameters vto, kp, gamma, lambda, and phi. These
parameters may be specified by the user, or they will be computed from
values specified for nsub, tox, nss, nfs, ngate, tps, uo, ucrit, uexp, and
utra. Vto is positive (negative) for enhancement mode and negative
(posiive) for depletion mode n-channel (p-channel) devices. Charge storage is
modeled by three constant capacitors, cgs, cgd, and cgb, by the nonlinear oxide
gate capacitance which is distributed among the gate-source, gate-drain, and
bulk regions using the formulation of J.E. Meyer, and by the nonlinear
depletion-layer capacitances for both substrate junctions which vary as the -1/2
power of junction voltage and are determined by the parameters cbd, cbs, and
pb.
.sp 0.2i
.TS
center;
l l l l l l.
name parameter default example units
.sp 0.2i
1 vto zero-bias threshold voltage 0.0 1.0 v
2 kp intrinsic transconductance parameter 2.417e-5 3.1e-5 a/v**2
3 gamma bulk threshold parameter 0.0 0.37 v**(1/2)
4 phi surface potential at strong inversion 0.6 0.65 v
5 lambda channel-length modulation parameter 0.0 1.0e-7 meters/v
6 rd drain ohmic resistance 0.0 1.0 ohms
7 rs source ohmic resistance 0.0 1.0 ohms
8 cgs gate-source overlap capacitance
per meter channel width 0.0 4.0e-11 f/m
9 cgd gate-drain overlap capacitance
per meter channel width 0.0 4.0e-11 f/m
10 cgb gate-bulk overlap capacitance
per meter channel length 0.0 2.0e-10 f/m
11 cbd zero-bias b-d junction capacitance
per sq-meter of junction area 0.0 2.0e-4 f/sq-m
12 cbs zero-bias b-s junction capacitance
per sq-meter of junction area 0.0 2.0e-4 f/sq-m
13 tox oxide thickness 1.0e-7 1.0e-7 meters
14 pb bulk junction potential 0.8 0.87 v
15 js bulk junction reverse saturation current
per sq-meter of junction area 1.0e-4 1.0e-4 a/sq-m
16 nsub substrate doping 0.0 4.0e15 /cm**3
17 nss surface state density 0.0 1.0e10 /cm**2
18 nfs fast surface state density 0.0 1.0e10 /cm**2
19 xj metallurgical junction depth 0.0 1.0e-6 meters
20 ld lateral diffusion (channel length is 0.0 0.8e-6 meters
reduced such that leff=l-2*ld)
21 wd width reduction (channel width is 0.0 1.0e-6 meters
reduced such that weff=w-2*wd)
22 ngate polysilicon gate doping al gate 1.0e20 /cm**3
23 tps type of polysilicon: +1 opp to sub 1.0
-1 same as sub
24 uo surface mobility 700 600 cm**2/v-s
25 ucrit critical field for mobility 1.0e+4 1.0e+4 v/cm
26 uexp critical field exponent (mobility) 0.0 0.1
27 utra transverse field coefficient (mobility) 0.0 0.3
28 kf flicker noise coefficient 0.0
29 af flicker noise exponent 1.0
30 fc coefficient for forward-bias 0.5
depletion capacitance formula
.TE
.bp
.sh 1 "SUBCIRCUITS"
.pp
A subcircuit that consists of spice elements can be defined and referenced
in a fashion similar to device models. The subcircuit is defined in the input
deck by a grouping of element cards; the program then automatically inserts
the group of elements wherever the subcircuit is referenced. There is no limit
on the size or complexity of subcircuits, and subcircuits may contain other
subcircuits. An example of subcircuit usage is given in Appendix A.
.sp 0.2i
.sh 2 ".subckt card"
.sp 0.2i
.b "General form:"
.(l
.subckt subnam n1 <n2 n3 ...>
.)l
.b "Examples:"
.(l
.subckt opamp 1 2 3 4
.)l
.pp
A subcircuit definition is begun with a .subckt card. Subnam is the
subcircuit name, and n1, n2, ... Are the external nodes, which cannot be zero.
The group of element cards which immediately follow the .subckt card define the
subcircuit. The last card in a subcircuit definition is the .ends card (see
below). Control cards may not appear within a subcircuit definition; however,
subcircuit definitions may contain anything else, including other subcircuit
definitions, device models, and subcircuit calls (see below). Note that any
device models or subcircuit definitions included as part of a subcircuit
definition are strictly local (i.e., such models and definitions are not known
outside the subcircuit definition). Also, any element nodes not included on
the .subckt card are strictly local, with the exception of 0 (ground) which is
always global.
.sh 2 ".ends card"
.sp 0.2i
.b "General form:"
.(l
.ends <subnam>
.)l
.b "Examples:"
.(l
.ends opamp
.)l
.pp
This card must be the last one for any subcircuit definition. The sub-
circuit name, if included, indicates which subcircuit definition is being
terminated; if omitted, all subcircuits being defined are terminated. The
name is needed only when nested subcircuit definitions are being made.
.sp 0.2i
.sh 2 "subcircuit calls"
.sp 0.2i
.b "General form:"
.(l
xyyyyyyy n1 <n2 n3 ...> subnam
.)l
.sp 0.2i
.b "Examples:"
.(l
x1 2 4 17 3 1 multi
.)l
.pp
Subcircuits are used in spice by specifying pseudo-elements beginning with
the letter x, followed by the circuit nodes to be used in expanding the sub-
circuit.
.bp
.sh 1 "CONTROL CARDS"
.sp 0.2i
.sh 2 ".temp card"
.sp 0.2i
.b "General form:"
.(l
.temp t1 <t2 <t3 ...>>
.)l
.b "Examples:"
.(l
.temp -55.0 25.0 125.0
.)l
.pp
This card specifies the temperatures at which the circuit is to be
simulated. T1, t2, ... Are the different temperatures, in degrees c. Temperatu
less than -223.0 deg c are ignored. Model data is specified at tnom degrees
(see the .option card for tnom); if the .temp card is omitted, the simulation
also will be performed at a temperature equal to tnom.
.sp 0.2i
.sh 2 ".width card"
.sp 0.2i
.b "General form:"
.(l
.width in=colnum out=colnum
.)l
.sp 0.2i
.b "Examples:"
.(l
.width in=72 out=133
.)l
.pp
Colnum is the last column read from each line of input; the setting takes
effect with the next line read. The default value for colnum is 80.
The out parameter specifies the output print width. Permissible values for
the output print width are 80 and 133.
.sp 0.2i
.sh 2 ".options card"
.sp 0.2i
.b "General form:"
.(l
.options opt1 opt2 ... (or opt=optval ...)
.)l
.b "Examples:"
.(l
.options noacct nolist nonode
.)l
.pp
This card allows the user to reset program control and user options for
specific simulation purposes. Any combination of the following options may be
included, in any order. 'x' (below) represents some positive number.
.TS
center;
l l.
option effect
.sp 0.2i
noacct supresses the listing of accounting and run time
statistics.
nolist supresses the summary listing of input data.
nomod suppresses the printout of the model parameters.
nopage suppresses page ejects
nonode supresses the printing of the node table.
opts causes the option values to be printed.
gmin=x resets the value of gmin, the minimum conductance
allowed by the program. The default value is 1.0e-12.
reltol=x resets the relative error tolerance of the program. The
default value is 0.001 (0.1 percent).
abstol=x resets the absolute current error tolerance of the
program. The default value is 1 picoamp.
vntol=x resets the absolute voltage error tolerance of the
program. The default value is 1 microvolt.
trtol=x resets the transient error tolerance. The default value
is 7.0. This parameter is an estimate of the factor by
which spice overestimates the actual truncation error.
chgtol=x resets the charge tolerance of the program. The default
value is 1.0e-14.
numdgt=x resets the number of significant digits printed for
output variable values. X must satisfy the relation
0 < x < 8. The default value is 4. Note: this option is
independent of the error tolerance used by spice (i.e., if
the values of options reltol, abstol, etc. Are not changed
then one may be printing numerical 'noise' for numdgt > 4.
tnom=x resets the nominal temperature. The default value is
25 deg c (298 deg k).
itl1=x resets the dc iteration limit. The default is 100.
itl2=x resets the dc transfer curve iteration limit. The
default is 50.
itl3=x resets the lower transient analysis iteration limit.
the default value is 4.
itl4=x resets the transient analysis timepoint iteration limit.
the default is 10.
itl5=x resets the transient analysis total iteration limit.
the default is 5000. Set itl5=0 to omit this test.
cptime=x the maximum cpu-time in seconds allowed for this job.
limtim=x resets the amount of cpu time reserved by spice for
generating plots should a cpu time-limit cause job
termination. The default value is 2 (seconds).
limpts=x resets the total number of points that can be printed
or plotted in a dc, ac, or transient analysis. The
default value is 201.
lvlcod=x if x is 2 (two), then machine code for the matrix
solution will be generated. Otherwise, no machine code is
generated. The default value is 2. Applies only to cdc
computers.
lvltim=x if x is 1 (one), the iteration timestep control is used.
if x is 2 (two), the truncation-error timestep is used.
the default value is 1. If method=Gear and maxord>2 then
lvltim is set to 2 by spice.
method=name sets the numerical integration method used by spice.
Possible names are Gear or trapezoidal. The default is
trapezoidal.
maxord=x sets the maximum order for the integration method if
Gear's variable-order method is used. X must be between
2 and 6. The default value is 2.
defl=x sets the default value for mos channel length.
defw=x sets the default value for mos channel width.
defad=x sets the default value for mos drain diffusion area.
defas=x sets the default value for mos source diffusion area.
.TE
.sp 0.2i
.sh 2 ".op card"
.sp 0.2i
.b "General form:"
.(l
.op
.)l
.sp 0.2i
.pp
The inclusion of this card in an input deck will force spice to determine
the dc operating point of the circuit with inductors shorted and capacitors
opened. Note: a dc analysis is automatically performed prior to a transient
analysis to determine the transient initial conditions, and prior to an ac
small-signal analysis to determine the linearized, small-signal models for
nonlinear devices.
.pp
Spice performs a dc operating point analysis if no other analyses are
requested.
.sp 0.2i
.sh 2 ".dc card"
.sp 0.2i
.b "General form:"
.(l
.dc srcnam vstart vstop vincr [src2 start2 stop2 incr2]
.)l
.sp 0.2i
.b "Examples:"
.(l
.dc vin 0.25 5.0 0.25
.dc vds 0 10 .5 vgs 0 5 1
.dc vce 0 10 .25 ib 0 10u 1u
.)l
.pp
This card defines the dc transfer curve source and sweep limits. Srcnam
is the name of an independent voltage or current source. Vstart, vstop, and
vincr are the starting, final, and incrementing values respectively. The first
example will cause the value of the voltage source vin to be swept from 0.25
volts to 5.0 volts in increments of 0.25 volts. A second source (src2) may
optionally be specified with associated sweep parameters. In this case,
the first source will be swept over its range for each value of the second
source. This option can be useful for obtaining semiconductor device output
characteristics. See the second example data deck in that section of the guide.
.sp 0.2i
.bp
.sh 2 ".nodeset card"
.sp 0.2i
.b "General form:"
.(l
.nodeset v(nodnum)=val v(nodnum)=val ...
.)l
.b "Examples:"
.(l
.nodeset v(12)=4.5 v(4)=2.23
.)l
.pp
This card helps the program find the dc solution by making a preliminary
pass with the specified nodes held to the given voltages. The restriction
is then released and the iteration continues to the true solution.
The .nodeset card may be necessary for convergence on bistable or astable
circuits. In general, this card should not be necessary.
.sp 0.2i
.sh 2 ".ic card"
.sp 0.2i
.b "General form:"
.(l
.ic v(nodnum)=val v(nodnum)=val ...
.)l
.b "Examples:"
.(l
.ic v(11)=5 v(4)=-5 v(2)=2.2
.)l
.pp
This card is for setting transient initial conditions. It has two
different interpretations, depending on whether the 'uic' parameter is
specified on the '.tran' card. Also, one should not confuse this card with
the '.nodeset' card. The '.nodeset' card is only to help dc convergence,
and does not affect final bias solution (except for multi-stable circuits).
The two interpretations of this card are as follows:
.sp 0.2i
1. When the 'uic' parameter is specified on the '.tran' card, then
.pp
The node voltages specified on the '.ic' card are used to compute
.pp
The capacitor, diode, bjt, jfet, and mosfet initial conditions.
.pp
This is equivalent to specifying the 'ic=...' parameter on each
.pp
Device card, but is much more convenient. The 'ic=...' parameter
.pp
Can still be specified and will take precedence over the '.ic'
.pp
Values. Since no dc bias solution is computed before the transient
.pp
Analysis, one should take care to specify all dc source voltages
.pp
On the '.ic' card if they are to be used to compute device initial
.pp
Conditions.
.sp 0.2i
2. When the 'uic' parameter is not specified on the '.tran' card,
.pp
The a dc bias solution will be computed before the transient analysis.
.pp
In this case, the node voltages specified on the '.ic' card will
.pp
Be forced to the desired initial values during the bias solution.
.pp
During transient analysis, the constraint on these node voltages
is removed.
.sp 0.2i
.sh 2 ".tf card"
.sp 0.2i
.b "General form:"
.(l
.tf outvar insrc
.)l
.b "Examples:"
.(l
.tf v(5,3) vin
.tf i(vload) vin
.)l
.pp
This card defines the small-signal output and input for the dc small-
signal analysis. Outvar is the small-signal output variable and insrc is the
small-signal input source. If this card is included, spice will compute the
dc small-signal value of the transfer function (outputinput), input
resistance, and output resistance. For the first example, spice would compute t
ratio of v(5,3) to vin, the small-signal input resistance at vin, and the
small-signal output resistance measured across nodes 5 and 3.
.sp 0.2i
.sh 2 ".sens card"
.sp 0.2i
.b "General form:"
.(l
.sens ov1 <ov2 ... >
.)l
.b "Examples:"
.(l
.sens v(9) v(4,3) v(17) i(vcc)
.)l
.pp
If a .sens card is included in the input deck, spice will determine the
dc small-signal sensitivities of each specified output variable with respect to
every circuit parameter. Note: for large circuits, large amounts of output
can be generated.
.sp 0.2i
.sh 2 ".ac card"
.sp 0.2i
.b "General form:"
.(l
.ac dec nd fstart fstop
.ac oct no fstart fstop
.ac lin np fstart fstop
.)l
.b "Examples:"
.(l
.ac dec 10 1 10k
.ac dec 10 1k 100meg
.ac lin 100 1 100hz
.)l
.sp 0.2i
.pp
Dec stands for decade variation, and nd is the number of points per
decade. Oct stands for octave variation, and no is the number of points per
octave. Lin stands for linear variation, and np is the number of points.
Fstart is the starting frequency, and fstop is the final frequency. If this
card is included in the deck, spice will perform an ac analysis of the circuit
over the specified frequency range. Note that in order for this analysis to be
meaningful, at least one independent source must have been specified with an ac
value.
.sp 0.2i
.sh 2 ".disto card"
.sp 0.2i
.b "General form:"
.(l
.disto rload <inter <skw2 <refpwr <spw2>>>>
.)l
.b "Examples:"
.(l
.disto rl 2 0.95 1.0e-3 0.75
.)l
.pp
This card controls whether spice will compute the distortion characteristic
of the circuit in a small-signal mode as a part of the ac small-signal
sinusoidal steady-state analysis. The analysis is performed assuming that
one or two signal frequencies are imposed at the input; let the two frequencies
be f1 (the nominal analysis frequency) and f2 (=skw2*f1). The program
then computes the following distortion measures:
.sp 0.2i
hd2 - the magnitude of the frequency component 2*f1 assuming that f2
is not present.
hd3 - the magnitude of the frequency component 3*f1 assuming that f2
is not present.
sim2 - the magnitude of the frequency component f1 + f2.
dim2 - the magnitude of the frequency component f1 - f2.
dim3 - the magnitude of the frequency component 2*f1 - f2.
.pp
Rload is the name of the output load resistor into which all distortion
power products are to be computed. Inter is the interval at which the summary
printout of the contributions of all nonlinear devices to the total distortion
is to be printed. If omitted or set to zero, no summary printout will be made.
Refpwr is the reference power level used in computing the distortion products.
if omitted, a value of 1 mw (that is, dbm) is used. Skw2 is the ratio of f2 to
f1. If omitted, a value of 0.9 is used (i.e., f2 = 0.9*f1). Spw2 is the
amplitude of f2. If omitted, a value of 1.0 is assumed.
.pp
The distortion measures hd2, hd3, sim2, dim2, and dim3 may also be be
printed and/or plotted (see the description of the .print and .plot cards).
.sp 0.2i
.sh 2 ".noise card"
.sp 0.2i
.b "General form:"
.(l
.noise outv insrc nums
.)l
.b "Examples:"
.(l
.noise v(5) vin 10
.)l
.pp
This card controls the noise analysis of the circuit. The noise analysis
is performed in conjunction with the ac analysis (see .ac card). Outv is an
output voltage which defines the summing point. Insrc is the name of the
independent voltage or current source which is the noise input reference. Nums
is the summary interval. Spice will compute the equivalent output noise at
the specified output as well as the equivalent input noise at the specified
input. In addition, the contributions of every noise generator in the circuit
will be printed at every nums frequency points (the summary interval). If nums
is zero, no summary printout will be made.
.pp
The output noise and the equivalent input noise may also be printed and/or
plotted (see the description of the .print and .plot cards).
.sp 0.2i
.sh 2 ".tran card"
.sp 0.2i
.b "General form:"
.(l
.tran tstep tstop <tstart <tmax>> <uic>
.)l
.b "Examples:"
.(l
.tran 1ns 100ns
.tran 1ns 1000ns 500ns
.tran 10ns 1us uic
.)l
.pp
Tstep is the printing or plotting increment for line-printer output.
For use with the post-processor, tstep is the suggested computing increment.
tstop is the final time, and tstart is
the initial time. If tstart is omitted, it is assumed to be zero. The
transient analysis always begins at time zero. In the interval <zero, tstart>,
the circuit is analyzed (to reach a steady state), but no outputs are stored.
In the interval <tstart, tstop>, the circuit is analyzed and outputs are
stored. Tmax is the maximum stepsize that spice will use (for default, the
program chooses either tstep or (tstop-tstart)/50.0, whichever is smaller.
Tmax is useful when one wishes too guarantee a computing interval which is
smaller than the printer increment, tstep.
.pp
Uic (use initial conditions) is an optional keyword which indicates that
the user does not want spice to solve for the quiescent operating point before
beginning the transient analysis. If this keyword is specified, spice uses the
values specified using ic=... On the various elements as the initial transient
condition and proceeds with the analysis. If the .ic card has been specified,
then the node voltages on the .ic card are used compute the intitial conditions
for the devices. Look at the description on the .ic card for its
interpretation when 'uic' is not specified.
.sp 0.2i
.sh 2 ".four card"
.sp 0.2i
.b "General form:"
.(l
.four freq ov1 <ov2 ov3 ...>
.)l
.b "Examples:"
.(l
.four 100k v(5)
.)l
.pp
This card controls whether spice performs a fourier analysis as a part of
the transient analysis. Freq is the fundamental frequency, and ov1, ..., are
the output variables for which the analysis is desired. The fourier analysis
is performed over the interval <tstop-period, tstop>, where tstop is the final
time specified for the transient analysis, and period is one period of the
fundamental frequency. The dc component and the first nine components are
determined. For maximum accuracy, tmax (see the .tran card) should be set to
period/100.0 (or less for very high-q circuits).
.sp 0.2i
.sh 2 ".print cards"
.sp 0.2i
.b "General form:"
.(l
.print prtype ov1 <ov2 ... Ov8>
.)l
.b "Examples:"
.(l
.print tran v(4) i(vin)
.print ac vm(4,2) vr(7) vp(8,3)
.print dc v(2) i(vsrc) v(23,17)
.print noise inoise
.print disto hd3 sim2(db)
.)l
.pp
This card defines the contents of a tabular listing of one to eight output
variables. Prtype is the type of the analysis (dc, ac, tran, noise, or
distortion) for which the specified outputs are desired. The form for voltage o
current output variables is as follows:
.sp 0.2i
.ip v(n1<,n2>) 10
specifies the voltage difference between nodes n1
and n2. If n2 (and the preceding comma) is omitted,
ground (0) is assumed. For the ac analysis, five
additional outputs can be accessed by replacing the
letter v by:
.sp 0.2i
vr - real part
vi - imaginary part
vm - magnitude
vp - phase
vdb - 20*log10(magnitude)
.sp 0.2i
.ip i(vxxxxxxx) 10
specifies the current flowing in the independent
voltage source named vxxxxxxx. Positive current
flows from the positive node, through the source, to
the negative node. For the ac analysis, the
corresponding replacements for the letter i may be
made in the same way as described for voltage outputs.
.sp 0.2i
.pp
Output variables for the noise and distortion analyses have a different
general form
form from that of the other analyses. The is
.(l
ov<(x)>
.)l
where ov is any of onoise (output noise), inoise (equivalent input noise),
hd2, hd3, sim2, dim2, or dim3 (see description of distortion analysis), and x
may be any of:
.(l
r - real part
i - imaginary part
m - magnitude (default if nothing specified)
p - phase
db - 20*log10(magnitude)
.)l
thus, sim2 (or sim2(m)) describes the magnitude of the sim2 distortion measure,
while hd2(r) describes the real part of the hd2 distortion measure.
.pp
There is no limit on the number of .print cards for each type of
analysis.
.sp 0.2i
.sh 2 ".plot cards"
.sp 0.2i
.b "General form:"
.(l
.plot pltype ov1 <(plo1,phi1)> <ov2 <(plo2,phi2)> ... Ov8>
.)l
.b "Examples:"
.(l
.plot dc v(4) v(5) v(1)
.plot tran v(17,5) (2,5) i(vin) v(17) (1,9)
.plot ac vm(5) vm(31,24) vdb(5) vp(5)
.plot disto hd2 hd3(r) sim2
.plot tran v(5,3) v(4) (0,5) v(7) (0,10)
.)l
.pp
This card defines the contents of one plot of from one to eight output
variables. Pltype is the type of analysis (dc, ac, tran, noise, or distortion)
for which the specified outputs are desired. The syntax for the ovi is
identical to that for the .print card, described above.
.pp
The optional plot limits (plo,phi) may be specified after any of the
output variables. All output variables to the left of a pair of plot limits
(plo,phi) will be plotted using the same lower and upper plot bounds. If plot
limits are not specified, spice will automatically determine the minimum and
maximum values of all output variables being plotted and scale the plot to fit.
More than one scale will be used if the output variable values warrant (i.e.,
mixing output variables with values which are orders-of-magnitude different
still gives readable plots).
.pp
The overlap of two or more traces on any plot is indicated by the letter
x.
.pp
When more than one output variable appears on the same plot, the
first variable specified will be printed as well as plotted. If a printout
of all variables is desired, then a companion .print card should be included.
.pp
There is no limit on the number of .plot cards specified for each
type of analysis.
.bp
.sh 1 "APPENDIX A: EXAMPLE DATA DECKS"
.sp 0.2i
.sh 2 "circuit 1"
.pp
The following deck determines the dc operating point and small-signal
transfer function of a simple differential pair. In addition, the ac
small-signal response is computed over the frequency range 1hz to 100meghz.
.(l
Simple differential pair
Vcc 7 0 12
Vee 8 0 -12
Vin 1 0 ac 1
Rs1 1 2 1k
Rs2 6 0 1k
Q1 3 2 4 mod1
Q2 5 6 4 mod1
Rc1 7 3 10k
Rc2 7 5 10k
Re 4 8 10k
.model mod1 npn bf=50 vbf=50 js=1.e-12 rb=100 cjc .5pf tf .6ns
.tf v(5) vin
.ac dec 10 1 100meg
.plot ac vm(5) vp(5)
.print ac vm(5) vp(5)
.end
.)l
.sp 0.2i
.sh 2 "circuit 2"
.sp 0.2i
The following deck computes the output characteristics of a mosfet
device over the range 0-10v for vds and 0-5v for vgs.
.sp 0.2i
.(l
Mos output characteristics
.option nonode nopage
Vds 3 0
Vgs 2 0
M1 1 2 0 0 mod1 l=4u w=6u ad=10p as=10p
.model mod1 nmos vto=-2 nsub=1.0e15 uo=550
* vids measures id, we could have used vds, but id would be negative
Vids 3 1
.dc vds 0 10 .5 vgs 0 5 1
.print dc i(vids) v(2)
.plot dc i(vids)
.end
.)l
.sp 0.2i
.sh 2 "circuit 3"
.sp 0.2i
.pp
The following deck determines the dc transfer curve and the transient
pulse response of a simple rtl inverter. The input is a pulse from 0 to 5
volts with delay, rise, and fall times of 2ns and a pulse width of 30ns. The
transient interval is 0 to 100ns, with printing to be done every nanosecond.
.sp 0.2i
.(l
Simple rtl inverter
Vcc 4 0 5
Vin 1 0 pulse 0 5 2ns 2ns 2ns 30ns
Rb 1 2 10k
Q1 3 2 0 q1
Rc 3 4 1k
.plot dc v(3)
.plot tran v(3) (0,5)
.print tran v(3)
.model q1 npn bf 20 rb 100 tf .1ns cjc 2pf
.dc vin 0 5 0.1
.tran 1ns 100ns
.end
.)l
.sp 0.2i
.sh 2 "circuit 4"
.pp
The following deck simulates a four-bit binary adder, using several sub-
circuits to describe various pieces of the overall circuit.
.sp 0.2i
.(l
Adder - 4 bit all-nand-gate binary adder
.sp 0.2i
*** subcircuit definitions
.sp 0.2i
.subckt nand 1 2 3 4
* nodes: input(2), output, vcc
Q1 9 5 1 qmod
D1clamp 0 1 dmod
Q2 9 5 2 qmod
D2clamp 0 2 dmod
Rb 4 5 4k
R1 4 6 1.6k
Q3 6 9 8 qmod
R2 8 0 1k
Rc 4 7 130
Q4 7 6 10 qmod
Dvbedrop 10 3 dmod
Q5 3 8 0 qmod
.ends nand
.subckt onebit 1 2 3 4 5 6
* nodes: input(2), carry-in, output, carry-out, vcc
X1 1 2 7 6 nand
X2 1 7 8 6 nand
X3 2 7 9 6 nand
X4 8 9 10 6 nand
X5 3 10 11 6 nand
X6 3 11 12 6 nand
X7 10 11 13 6 nand
X8 12 13 4 6 nand
X9 11 7 5 6 nand
.ends onebit
.subckt twobit 1 2 3 4 5 6 7 8 9
* nodes: input - bit0(2) / bit1(2), output - bit0 / bit1,
* carry-in, carry-out, vcc
X1 1 2 7 5 10 9 onebit
X2 3 4 10 6 8 9 onebit
.ends twobit
.sp 0.2i
.subckt fourbit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
* nodes: input - bit0(2) / bit1(2) / bit2(2) / bit3(2),
* output - bit0 / bit1 / bit2 / bit3, carry-in, carry-out, vcc
X1 1 2 3 4 9 10 13 16 15 twobit
X2 5 6 7 8 11 12 16 14 15 twobit
.ends fourbit
.sp 0.2i
*** define nominal circuit
.sp 0.2i
.model dmod d
.model qmod npn(bf=75 rb=100 cje=1pf cjc=3pf)
Vcc 99 0 dc 5v
Vin1a 1 0 pulse(0 3 0 10ns 10ns 10ns 50ns)
.sp 0.2i
.sp 0.2i
Vin1b 2 0 pulse(0 3 0 10ns 10ns 20ns 100ns)
Vin2a 3 0 pulse(0 3 0 10ns 10ns 40ns 200ns)
Vin2b 4 0 pulse(0 3 0 10ns 10ns 80ns 400ns)
Vin3a 5 0 pulse(0 3 0 10ns 10ns 160ns 800ns)
Vin3b 6 0 pulse(0 3 0 10ns 10ns 320ns 1600ns)
Vin4a 7 0 pulse(0 3 0 10ns 10ns 640ns 3200ns)
Vin4b 8 0 pulse(0 3 0 10ns 10ns 1280ns 6400ns)
X1 1 2 3 4 5 6 7 8 9 10 11 12 0 13 99 fourbit
Rbit0 9 0 1k
Rbit1 10 0 1k
Rbit2 11 0 1k
Rbit3 12 0 1k
Rcout 13 0 1k
.plot tran v(1) v(2) v(3) v(4) v(5) v(6) v(7) v(8)
.plot tran v(9) v(10) v(11) v(12) v(13)
.print tran v(1) v(2) v(3) v(4) v(5) v(6) v(7) v(8)
.print tran v(9) v(10) v(11) v(12) v(13)
.sp 0.2i
.tran 1ns 6400ns
*** (for those with money (and memory) to burn)
.sp 0.2i
.opt acct list node limpts=6401
.end
.)l
.sp 0.2i
.sh 2 "circuit 5"
.pp
The following deck simulates a transmission-line inverter. Two
transmission-line elements are required since two propagation modes are excited.
In the case of a coaxial line, the first line (t1) models the inner conductor wi
respect to the shield, and the second line (t2) models the shield with respect
to the outside world.
.sp 0.2i
.(l
Transmission-line inverter
V1 1 0 pulse(0 1 0 0.1n)
R1 1 2 50
X1 2 0 0 4 tline
R2 4 0 50
.subckt tline 1 2 3 4
T1 1 2 3 4 z0=50 td=1.5ns
T2 2 0 4 0 z0=100 td=1ns
.ends tline
.tran 0.1ns 20ns
.plot tran v(2) v(4)
.end
.)l
.bp
.sh 1 "APPENDIX B: NONLINEAR DEPENDENT SOURCES"
.pp
Spice allows circuits to contain dependent sources characterized by any of
the four equations
.sp 0.2i
i=f(v) v=f(v) i=f(i) v=f(i)
.sp 0.2i
where the functions must be polynomials, and the arguments may be
multidimensional. The polynomial functions are specified by a set of coefficien
p0, p1, ..., pn. Both the number of dimensions and the number of coefficients
are arbitrary. The meaning of the coefficients depends upon the dimension of
the polynomial, as shown in the following examples:
.pp
Suppose that the function is one-dimensional (that is, a function of one
argument). Then the function value fv is determined by the following
expression in fa (the function argument):
.sp 0.2i
fv = p0 + (p1*fa) + (p2*fa**2) + (p3*fa**3) + (p4*fa**4)
.sp 0.2i
+ (p5*fa**5) + ...
.pp
Suppose now that the function is two-dimensional, with arguments fa and
fb. Then the function value fv is determined by the following expression:
.sp 0.2i
fv = p0 + (p1*fa) + (p2*fb) + (p3*fa**2) + (p4*fa*fb) + (p5*fb**2)
.sp 0.2i
+ (p6*fa**3) + (p7*fa**2*fb) + (p8*fa*fb**2) + (p9*fb**3) + ...
.pp
Consider now the case of a three-dimensional polynomial function with
arguments fa, fb, and fc. Then the function value fv is determined by the
following expression:
.sp 0.2i
fv = p0 + (p1*fa) + (p2*fb) + (p3*fc) + (p4*fa**2) + (p5*fa*fb)
.sp 0.2i
+ (p6*fa*fc) + (p7*fb**2) + (p8*fb*fc) + (p9*fc**2) + (p10*fa**3)
.sp 0.2i
+ (p11*fa**2*fb) + (p12*fa**2*fc) + (p13*fa*fb**2)
.sp 0.2i
+ (p14*fa*fb*fc)
.sp 0.2i
+ (p15*fa*fc**2) + (p16*fb**3) + (p17*fb**2*fc) + (p18*fb*fc**2)
.sp 0.2i
+ (p19*fc**3) + (p20*fa**4) + ...
.pp
Note: if the polynomial is one-dimensional and exactly one coefficient is
specified, then spice assumes it to be p1 (and p0 = 0.0), in order to
facilitate the input of linear controlled sources.
.pp
For all four of the dependent sources described below, the initial
condition parameter is described as optional. If not specified, spice assumes 0
the initial condition for dependent sources is an initial 'guess' for the value
of the controlling variable. The program uses this initial condition to obtain
the dc operating point of the circuit. After convergence has been obtained,
the program continues iterating to obtain the exact value for the controlling
variable. Hence, to reduce the computational effort for the dc operating
point (or if the polynomial specifies a strong nonlinearity), a value fairly
close to the actual controlling variable should be specified for the initial
condition.
.sh 2 "voltage-controlled current sources"
.sp 0.2i
.b "General form:"
.(l
gxxxxxxx n+ n- <poly(nd)> nc1+ nc1- ... P0 <p1 ...> <ic=...>
.)l
.sp 0.2i
Examples: g1 1 0 5 3 0 0.1mmho
gr 17 3 17 3 0 1m 1.5m ic=2v
gmlt 23 17 poly(2) 3 5 1 2 0 1m 17m 3.5u ic=2.5, 1.3
.pp
N+ and n- are the positive and negative nodes, respectively. Current flow
is from the positive node, through the source, to the negative node. Poly(nd)
only has to be specified if the source is multi-dimensional (one-dimensional is
the default). If specified, nd is the number of dimensions, which must be
positive. Nc1+, nc1-, ... Are the positive and negative controlling nodes,
respectively. One pair of nodes must be specified for each dimension. P0, p1,
p2, ..., pn are the polynomial coefficients. The (optional) initial condition
is the initial guess at the value(s) of the controlling voltage(s). If not
specified, 0.0 is assumed. The polynomial specifies the source current as a
function of the controlling voltage(s). The second example above describes a
current source with value
.sp 0.2i
i = 1e-3*v(17,3) + 1.5e-3*v(17,3)**2
.sp 0.2i
note that since the source nodes are the same as the controlling nodes, this
source actually models a nonlinear resistor.
.sp 0.2i
.sp 0.2i
.sp 0.2i
.sp 0.2i
.sp 0.2i
.sh 2 "voltage-controlled voltage sources"
.sp 0.2i
.b "General form:"
.(l
exxxxxxx n+ n- <poly(nd)> nc1+ nc1- ... P0 <p1 ...> <ic=...>
.)l
.sp 0.2i
Examples: e1 3 4 21 17 10.5 2.1 1.75
ex 17 0 poly(3) 13 0 15 0 17 0 0 1 1 1 ic=1.5,2.0,17.35
.pp
N+ and n- are the positive and negative nodes, respectively. Poly(nd)
only has to be specified if the source is multi-dimensional (one-dimensional is
the default). If specified, nd is the number of dimensions, which must be
positive. Nc1+, nc1-, ... Are the positive and negative controlling nodes,
respectively. One pair of nodes must be specified for each dimension. P0, p1,
p2, ..., pn are the polynomial coefficients. The (optional) initial condition
is the initial guess at the value(s) of the controlling voltage(s). If not
specified, 0.0 is assumed. The polynomial specifies the source voltage as a
function of the controlling voltage(s). The second example above describes a
voltage source with value
.sp 0.2i
v = v(13,0) + v(15,0) + v(17,0)
.sp 0.2i
(in other words, an ideal voltage summer).
.sh 2 "current-controlled current sources"
.sp 0.2i
.b "General form:"
.(l
fxxxxxxx n+ n- <poly(nd)> vn1 <vn2 ...> p0 <p1 ...> <ic=...>
.)l
.sp 0.2i
Examples: f1 12 10 vcc 1ma 1.3m
fxfer 13 20 vsens 0 1
.pp
N+ and n- are the positive and negative nodes, respectively. Current flow
is from the positive node, through the source, to the negative node. Poly(nd)
only has to be specified if the source is multi-dimensional (one-dimensional is
the default). If specified, nd is the number of dimensions, which must be
positive. Vn1, vn2, ... Are the names of voltage sources through which the
controlling current flows; one name must be specified for each dimension. The
direction of positive controlling current flow is from the positive node,
through the source, to the negative node of each voltage source. P0, p1,
p2, ..., pn are the polynomial coefficients. The (optional) initial condition
is the initial guess at the value(s) of the controlling current(s) (in amps).
If not specified, 0.0 is assumed. The polynomial specifies the source current
as a function of the controlling current(s). The first example above describes
a current source with value
.sp 0.2i
i = 1e-3 + 1.3e-3*i(vcc)
.sp 0.2i
.sp 0.2i
.sp 0.2i
.sp 0.2i
.sp 0.2i
.sh 2 "current-controlled voltage sources"
.sp 0.2i
.b "General form:"
.(l
hxxxxxxx n+ n- <poly(nd)> vn1 <vn2 ...> p0 <p1 ...> <ic=...>
.)l
.sp 0.2i
Examples: hxy 13 20 poly(2) vin1 vin2 0 0 0 0 1 ic=0.5 1.3
hr 4 17 vx 0 0 1
.pp
N+ and n- are the positive and negative nodes, respectively. Poly(nd)
only has to be specified if the source is multi-dimensional (one-dimensional is
the default). If specified, nd is the number of dimensions, which must be
positive. Vn1, vn2, ... Are the names of voltage sources through which the
controlling current flows; one name must be specified for each dimension. The
direction of positive controlling current flow is from the positive node,
through the source, to the negative node of each voltage source. P0, p1,
p2, ..., pn are the polynomial coefficients. The (optional) initial condition
is the initial guess at the value(s) of the controlling current(s) (in amps).
If not specified, 0.0 is assumed. The polynomial specifies the source voltage
as a function of the controlling current(s). The first example above describes
a voltage source with value
.sp 0.2i
v = i(vin1)*i(vin2)