AUSAM/source/mac/macdoc/m6800.rfile

	R-FILE  WRITEUP.		1/3/79

	Motorola 6800			(m6800)


  Addressing modes.
  ---------- -----

	expression(x)			address memory relative to
					the index register 'x'.

	#expression			generate an immediate mode
					instruction.

	expression			address memory directly

	a,expression(x)			address memory offset by x,
					and operate on the a-register.

	b,expression(x)			address memory offset by x,
					and operate on the b-register.

	a,#expression			immediate mode and a-register.

	b,#expression			immediate mode and b-register.

	a,expression			a-register and memory.

	b,expression			b-register and memory.

	a				a-register only

	b				b-register only



  Constant definition.
  -------- ----------


	dca	expression		defines a 16 bit constant,
					value=expression.

	dcb	expression		defines an 8 bit constant,
					value=expression.

	dc	expression		defines an 8 bit constant.
	dc	"string"		defines a set of characters
					one per consecutive byte
					of memory.

  Opcodes and what they do.
  ------- --- ---- ---- --


	nop		no operation
	tap		transfer a to cond code
	tpa		transfer cc to a
	inx		increment x register
	dex		decrement x
	clv		clear v-bit
	sev		set v-bit
	clc		clear carry bit
	sec		set carry
	cli		clear interrupt
	sei		set interrupt
	sba		subtract a and b
	cba		compare a and b
	tab		transfer a to b
	tba		transfer b to a
	daa		decimal adjust
	aba		add b to a
	bra		branch
	bhi		branch on high
	bls		branch if lower or same
	bcc		br. if carry clear
	bcs		br. if carry set
	bne		br not equal
	beq		br if equal
	bvc		br if overflow clear
	bvs		br if    "     set
	bpl		br if plus
	bmi		br if minus
	bge		br greater or equal to zero
	blt		br if less than zero
	ble		br less or equal to zero
	tsx		transfer sp to index x
	ins		increment sp
	pul		pop off stack
	des		decrement sp
	txs		transfer x to sp
	psh		push onto stack
	rts		return from subroutine
	rti		return from interrupt
	wai		wait for interrupt
	swi		software interrupt
	neg		negate
	com		complement
	lsr		logical shift right
	ror		rotate right
	asr		arithmatic shift right
	asl		arithmatic shift left
	rol		rotate left
	dec		decrement
	inc		increment
	tst		set condition code
	jmp		unconditional branch
	clr		set to zero
	sub		subtract
	cmp		compare
	sbc		subtract with carry
	and		logical and
	bit		bit test
	lda		load
	sta		store
	eor		exclusive or
	adc		add with carry
	ora		or
	add		addition
	cpx		compare index reg.
	bsr		branch to subroutine
	jsr		jump to subroutine
	lds		load stack pointer
	ldx		load x reg.
	sts		store sp
	stx		store x reg.