NetBSD-5.0.2/sys/arch/arm/xscale/becc_pci_space_asm.S

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/*	$NetBSD: becc_pci_space_asm.S,v 1.1 2003/05/30 18:38:02 thorpej Exp $	*/

/*
 * Copyright (c) 2003 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <arm/asm.h>
#include <arm/cpuconf.h>

/*
 * Bus space functions for BECC PCI space access.  We have to swizzle
 * the address for 1 and 2 byte accesses when in big-endian mode.
 */

/*
 * read single
 */

ENTRY(becc_pci_bs_r_1)
#ifdef __ARMEB__
	add	r1, r1, r2
	eor	r1, r1, #0x3
	ldrb	r0, [r1]
#else
	ldrb	r0, [r1, r2]
#endif /* __ARMEB__ */
	mov	pc, lr

ENTRY(becc_pci_bs_r_2)
#ifdef __ARMEB__
	add	r1, r1, r2
	eor	r1, r1, #0x2
	ldrh	r0, [r1]
#else
	ldrh	r0, [r1, r2]
#endif /* __ARMEB__ */
	mov	pc, lr

ENTRY(becc_pci_bs_r_4)
	ldr	r0, [r1, r2]
	mov	pc, lr

/*
 * write single
 */

ENTRY(becc_pci_bs_w_1)
#ifdef __ARMEB__
	add	r1, r1, r2
	eor	r1, r1, #0x3
	strb	r3, [r1]
#else
	strb	r3, [r1, r2]
#endif /* __ARMEB__ */
	mov	pc, lr

ENTRY(becc_pci_bs_w_2)
#ifdef __ARMEB__
	add	r1, r1, r2
	eor	r1, r1, #0x2
	strh	r3, [r1]
#else
	strh	r3, [r1, r2]
#endif /* __ARMEB__ */
	mov	pc, lr

ENTRY(becc_pci_bs_w_4)
	str	r3, [r1, r2]
	mov	pc, lr