# /* */ #define PHYS 0 #define KDAT 1 #define MEOF 2 #define KINS 3 #define KSLP 4 #define KISA0 0172340 /* * Memory special file * minor device 0 is physical memory * minor device 1 is kernel data space * minor device 2 is EOF/RATHOLE * minor device 3 is kernel instruction space (PBJ) * minor device 4 is sleep/wakeup (Yuck, you say ?) JSK */ #include "/usr/sys/h/param.h" #include "/usr/sys/h/user.h" #include "/usr/sys/h/conf.h" #include "/usr/sys/h/seg.h" mmread(dev) { register c, bn, on; int a, d; if(dev.d_minor == MEOF) return; if (dev.d_minor == KSLP) { /* * user program : * fid = open ("/dev/kslp,0"); * read (fid, sleepaddr, priority) */ sleep (u.u_base, u.u_count); return; } do { bn = lshift(u.u_offset, -6); on = u.u_offset[1] & 077; spl7(); a = UISA->r[0]; d = UISD->r[0]; UISD->r[0] = 077406; switch (dev.d_minor) { /* PBJ */ default: u.u_error = ENXIO; return; case PHYS: UISA->r[0] = bn; break; case KDAT: UISA->r[0] = (ka6-6)->r[(bn>>7)&07] + (bn & 0177); break; case KINS: UISA->r[0] = KISA0->r[(bn>>7)&07] + (bn & 0177); } c = fuibyte(on); UISA->r[0] = a; UISD->r[0] = d; spl0(); } while(u.u_error==0 && passc(c)>=0); } mmwrite(dev) { register c, bn, on; int a, d; if(dev.d_minor == 2) { c = u.u_count; u.u_count = 0; u.u_base =+ c; dpadd(u.u_offset, c); return; } for(;;) { bn = lshift(u.u_offset, -6); on = u.u_offset[1] & 077; if ((c=cpass())<0 || u.u_error!=0) break; a = UISA->r[0]; d = UISD->r[0]; spl7(); UISD->r[0] = 077406; switch (dev.d_minor) { /* PBJ */ default: u.u_error = ENXIO; return; case PHYS: UISA->r[0] = bn; break; case KDAT: UISA->r[0] = (ka6-6)->r[(bn>>7)&07] + (bn & 0177); break; case KINS: UISA->r[0] = KISA0->r[(bn>>7)&07] + (bn & 0177); } suibyte(on, c); UISA->r[0] = a; UISD->r[0] = d; spl0(); } }