[COFF] GE-635 GECOS?

[Paul Winalski via COFF]

On Sat, Apr 4, 2026 at 2:59 PM Clem Cole <clemc at ccc.com> wrote:

>
> So, except for the Model 67 [which was a Model 65 plus the VM hardware
> called "DAT box" [Data Address and Translation], plus some new microcode,
> all had 8-bit bytes, 16-bit ½ words, and 32-bit full words].  But because
> the 24-bit addresses were stored and primarily passed as 32-bit words, the
> 67 could run code targeted for the other models with straightforward
> changes [67 had a couple of new user space instructions - Branch and
> Store (BAS), Branch and Store Register (BASR)†, and some new privileged
> operations specific to the data translation hardware.]
>

The System/360/370 architecture had two branch instructions designed for
subroutine calls:  BAL (Branch And Link) and its two-register counterpart
BALR (Branch And Link Register).  The instructions take two operands:  a
target address (in base/displacement form for BAL; a register number for
BALR), and a register to receive the link information.  The low 24 bits of
the target address are the address of the next instruction to be executed,
i.e., the first instruction of the routine to be called.  The address of
the instruction immediately following the BAL/BALR, i.e., the subroutine
return address, is stored in the low 24 bits of the link register.  Into
the high 8 bits of the link register are stored the current instruction
length code, the condition code, and the program mask bits.  This allows
the callee to restore the caller's condition code and exception handling
information before returning to the caller.

But the use of the high 8 bits of the link register became a problem when
the S/360-67 expanded addressing to 32 bits.  They had to add two new
instructions--BAS and BASR (Branch and Store)--that stored all 32 bits of
the return address versus using the top 8 bits for program status
information.


> Years later, Gordon Bell would state that the #1 issue limiting the
> longevity of an ISA was too few address bits.  IBM started System 370 with
> the same 24 bits, but by the 370-XA, it finally made everything 32 bits.
>

S/370 -XA was actually 31 bits.  The highest order bit of the return
address indicated the addressing mode in use by the caller:  0=24-bit mode,
1=31-bit mode.  This was necessary to allow mixing of 31-bit and 24-bit
addressing.

-Paul W.