[pups] Spares, et. al for 11/44 system

Carl Lowenstein cdl at mpl.ucsd.edu
Thu Mar 8 07:15:48 AEST 2001

> Date: Tue, 6 Mar 2001 20:07:00 -0500 (EST)
> From: "Gregory R. Travis" <greg at ciswired.com>
> To: pups at minnie.cs.adfa.edu.au
> Subject: [pups] Spares, et. al for 11/44 system
> p.s.  The Nat. Semi board is a bit strange.  It has an area of
> 16x4 TI 64K-bit chips (i.e  64x64k/8 = .5MB) and another
> area of 10x4 TI 64K-bit chips (i.e. .3MB).  No matter
> what I do, I can't do the math to get this board to
> fit into a 256/512/1MB size.  I ASSUME it's a .5MB
> board, but what about the extra chips?

Nat.Semi. used to make ECC memory boards for the PDP11.

I had one once, it looks like you have one now.  My arithmetic says 5
extra bits per 8-bit byte makes for single-error correcting, dual-error
detecting ECC on the byte level.  Vaxes do it with 39 bits per 32-bit
word, Alphas do it with 72 bits per 64-bit word.  Economy of scale.

As I remember, you could just ignore the ECC and it would work like
a standard parity memory board, except that it very rarely had any
parity errors.


        carl lowenstein         marine physical lab     u.c. san diego
        {decvax|ucbvax} !ucsd!mpl!cdl                 cdl at mpl.ucsd.edu
                                                  clowenstein at ucsd.edu

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