[TUHS] Early non-Unix filesystems?
peter at rulingia.com
Fri Mar 25 08:50:49 AEST 2016
On 2016-Mar-24 11:17:18 +0100, Johnny Billquist <bqt at update.uu.se> wrote:
>It is the normal behavior of any instruction that interrupts are not
>recognized until the next instruction fetch. This is how the microcode
>works, and it is also pretty much the same in any processor today.
>individual instructions. You still get a fetch between each instruction,
>at which point, interrupts will be recognized.
Some instructions inhibit the "check for interrupts at the end of this
instruction" check. I'm most familiar with the 8080 EI instruction,
which enabled interrupts after the following instruction (so things like
EI;HLT didn't have a window). It seems the PDP-11 SPL behaves the same.
>memory access to get the actual content. The fun thing happens if you
>set the indirect bit, and give your own address. This is then an
>infinite memory reference. And the KA10 can not be broken out of that
>lookup. The only solution is to pull the power plug.
I can't think of any modern architectures that still support this sort
of indefinite indirection but I know the ITT 3200 (custom CPU for
controlling telephone exchanges) could do this. In it's case, a normal
front-panel reset would recover.
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