[TUHS] SPARC is CRAPS spelled backwards.
dot at dotat.at
Mon Sep 24 21:25:46 AEST 2018
Paul Winalski <paul.winalski at gmail.com> wrote:
> In general, a CISC instruction set encoding can express the same
> algorithm more compactly than a RISC instruction set. Once CISC
> technology solved the instruction pipelining and decoding problem, it
> gained an advantage over RISC architectures such as Alpha because the
> instruction set stream was less verbose.
It's more subtle than that, I think. One of the best contributions to this
discussion was John Mashey's classic comp.arch article (which I originally
read in 1994, I think) -
What is striking about it is that the two dominant architectures now are
(very roughly) the least CISCy CISC and the least RISCy RISC. In
particular x86 did not go in for elaborate addressing modes and highly
orthogonal instruction sets that allow you to use the elaborate addressing
modes multiple times in one instruction. (Compare it with later 68Ks, for
contrast.) So the translation to RISC-style micro-ops does not end up with
ridiculously long dependency chains within most instructions.
f.anthony.n.finch <dot at dotat.at> http://dotat.at/
Shannon: South 3 or 4, increasing 5 to 7, perhaps gale 8 later. Moderate,
becoming rough, then very rough later in far northwest. Fair then occasional
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