[TUHS] Encoding an ISA: Random Logic vs. Control Stores

[Jon Steinhart]

Lawrence Stewart writes:
> I don’t think this is right.  The irregular parts of die photographs didn’t
> get that way because the hardware engineers were writing bad (spaghetti)
> code.  They got that way due to several levels of optimizing tools working
> over quite sensible RTL or System C code or whatever. You might as well ding
> the output of -O3 for being incomprehensible.

Yes and no.  The irregular parts of die photographs are from the instantiation
of random logic.  The point that I obviously failed to make earlier is that it
looks way different than the instantiation of more regular logic.

But there's also a historical element here and I was living in the past.  Sure,
what you say is true of modern designs which I haven't been involved with; my
current history is limited to FPGA designs.  But, going back a while, look up
Rubylith (no relation to Ruby) which is how ICs were laid out pre-CAD days.
The regular and random parts look remarkably similar to the way that they do
today.  No compilers needed to make things look that way.

Just for some more BTL history, I started doing work on CAD software around
1985.  I'm thinking that it was maybe 1988 or 1989 when a bunch of area 10
folks (Carl, Greg, Hal, ...) left BTL to found what I think was called Silicon
Design Labs which eventually merged with Silicon Compilers (or the other way
around).  I think that they were later bought out by one of the current big
CAD system survivors.

Jon