[TUHS] 68k prototypes & microcode

[Jason Stevens]

Apparently they are getting 68040 levels of performance with a Pi...  and
that interpreted.  Going with JIT it's way higher.

	-----Original Message-----
	From:	Gregg Levine [SMTP:gregg.drwho8 at gmail.com]
	Sent:	Saturday, February 13, 2021 10:30 AM
	To:	Jason Stevens; The Eunuchs Hysterical Society
	Subject:	Re: [TUHS] 68k prototypes & microcode

	An amazing idea.
	-----
	Gregg C Levine gregg.drwho8 at gmail.com
	"This signature fought the Time Wars, time and again."

	On Fri, Feb 12, 2021 at 7:51 PM Jason Stevens
	<jsteve at superglobalmegacorp.com> wrote:
	>
	> You might find this interesting
	>
	> https://twitter.com/i/status/1320767372853190659
	> <https://twitter.com/i/status/1320767372853190659>
	>
	> It's a pi (arm) running Musashi a 68000 core, but using voltage
buffers it's
	> plugged into the 68000 socket of an Amiga!
	>
	> You can find more info on their github:
	>
	> https://github.com/captain-amygdala/pistorm
	> <https://github.com/captain-amygdala/pistorm>
	>
	> Maybe we are at the point where numerous cheap CPU's can eliminate
FPGA's?
	>
	>         -----Original Message-----
	>         From:   Michael Parson [SMTP:mparson at bl.org]
	>         Sent:   Friday, February 05, 2021 10:43 PM
	>         To:     The Eunuchs Hysterical Society
	>         Subject:        Re: [TUHS] 68k prototypes & microcode
	>
	>         On 2021-02-04 16:47, Henry Bent wrote:
	>         > On Thu, Feb 4, 2021, 17:40 Adam Thornton
<athornton at gmail.com>
	> wrote:
	>         >
	>         >> I'm probably Stockholm Syndrommed about 6502.  It's
what I grew
	> up on,
	>         >> and
	>         >> I still like it a great deal.  Admittedly
register-starved (well,
	>
	>         >> unless
	>         >> you consider the zero page a whole page of registers),
	> but...simple,
	>         >> easy
	>         >> to fit in your head, kinda wonderful.
	>         >>
	>         >> I'd love a 64-bit 6502-alike (but I'd probably give it
more than
	> three
	>         >> registers).  I mean given how little silicon (or how
few FPGA
	> gates) a
	>         >> reasonable version of that would take, might as well
include
	> 65C02 and
	>         >> 65816 cores in there too with some sort of
mode-switching
	> instruction.
	>         >> Wouldn't a 6502ish with 64-bit wordsize and a 64-bit
address bus
	> be
	>         >> fun?
	>         >> Throw in an onboard MMU and FPU too, I suppose, and
then you
	> could
	>         >> have a
	>         >> real system on it.
	>         >>
	>         >>
	>         > Sounds like a perfect project for an FPGA.  If there's
already a
	> 6502
	>         > implementation out there, converting to 64 bit should be
fairly
	> easy.
	>
	>         There are FPGA implementations of the 6502 out there. If
you've not
	> seen
	>         it, check out the MiSTer[0] project, FPGA implementations
of a LOT
	> of
	>         computers, going back as far as the EDSAC, PDP-1, a LOT of
8, 16,
	> and 32
	>         bit systems from the 70s and 80s along with gaming
consoles from the
	> 70s
	>         and 80s.
	>
	>         Keeping this semi-TUHS related, one guy[1] has even
implemented a
	>         Sparc 32m[2] (I think maybe an SS10), which boots SunOS 4,
5, Linux,
	>         NetBSD, and even the Sparc version of NeXTSTEP, but it's
not part of
	> the
	>         "official" MiSTer bits (yet?).
	>
	>         --
	>         Michael Parson
	>         Pflugerville, TX
	>         KF5LGQ
	>
	>         [0] https://github.com/MiSTer-devel/Main_MiSTer/wiki
	>         [1] https://temlib.org/site/
	>         [2] https://temlib.org/pub/mister/SS/