[TUHS] mental architecture models, Anyone ever heard of teaching a case study of Initial Unix?

Charles H Sauer (he/him) sauer at technologists.com
Sat Jul 6 08:08:01 AEST 2024


On 7/5/2024 4:49 PM, Larry McVoy wrote:
> On Fri, Jul 05, 2024 at 05:38:03PM -0400, John Levine wrote:
>> It appears that Peter Yardley <peter.martin.yardley at gmail.com> said:
>>> The DG Nova had a pretty nice architecture. 2 accumulators, 2 index registers, program counter, status register. No stack register tho. There was a micro processor version by Fairchild.
>>
>> It did, but it was word addressed which makes it an historical
>> curiosity like its spiritual predecessors PDP-4/5/7/8/9.
>>
>> I also have a mental model of a PDP-11 but these days it's more a simplified 386
>> leaving out the dumb or useless stuff.
> 
> I took a look at x86 in 386/486 days and found it to be enough of a mess that
> I stopped looking.  In no way did it compare the simplicity and elegance
> of the PDP-11.  I had a TA, Ken Witte, who could read octal dumps of PDP-11
> assembly like it was C.  I'm pretty sure the way the instructions were
> encoded was a big part of what made that possible.

Assuming you mean the same Kendall Witte that spearheaded Dell SVR4 
(https://notes.technologists.com/notes/2008/01/10/a-brief-history-of-dell-unix/), 
he is quite fluent in X86 as well. After Dell SVR4 he became prominent 
in Dell firmware work. I saw him just over a year ago at a gathering of 
Dell "old timers".

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