[TUHS] System III - TCP/IP

[Oliver Lehmann]

http://cvs.laladev.org/index.html/P8000/WEGA/src/uts/sys/ureg.c?rev=1.9&content-type=text/x-cvsweb-markup

1.9 is the current version 1.1 is the plain SysIII file...


Oliver Lehmann <lehmann at ans-netz.de> wrote:

> This is for example the ureg.c which shows the Segmentation Code for the
> current SysIII Kernel I redid from original SysIII Sources + Disassembled
> object-File analysis of the current SysIII Kernel running on the system:
>
> http://cvs.laladev.org/index.html/P8000/WEGA/src/uts/sys/ureg.c?rev=1.1&content-type=text/x-cvsweb-markup
>
>
>
> Oliver Lehmann <lehmann at ans-netz.de> wrote:
>
>> I hit the send button to fast :(
>>
>> Oliver Lehmann <lehmann at ans-netz.de> wrote:
>>
>>> Nick Downing <downing.nick at gmail.com> wrote:
>>>
>>>> You can most likely implement a split I/D architecture by having code
>>>> execute out of a different segment than data, although I haven't
>>>> checked the datasheet so I don't know for sure if this is possible.
>>>
>>> I have 3 different MMUs available. Stack, Code and Data it is called in
>>> the Circuit diagram. I probably have to lookup the references but I still
>>> don't get why the kernel can only work with 64k of RAM as it is right now
>>> compiled as a segmented programm and uses more memory already with SysIII.
>>> Only the boot0-loader is compiled unsegmented and also some small
>>> utilities. Every other portion of the system uses the segmentation features
>>> of the Z8001 and is not limited to 64k adressable space.
>>>
>>> The system has right now MB of
>>
>> The system has right now around 6 MB of RAM but can be upgraded to 16MB
>> minus 64KB (Due to a firmware bug) of RAM.