Hi Matt,
I’ve responded on list about the early unix development process as I understand it, but I want to avoid discussing things that are not directly related to the history of Unix. Hence this PM as well.
> Where I'm trying to put this sort of knowledge into use is I'm starting to spec out a kernel bootstrap for the RPi Pico and Pine64 Ox64 boards (ARM32 and RISCV64 respectively) that is not only sufficient to start a V7-ish kernel on each, but that are ultimately based on the same design, varying literally only where the hardware strictly necessitates it, but similar enough that reading the two assembly files side by side yields essentially the exact same discrete operations.
I have a similar interest, working with early Unix and modern RiscV hardware for a compare and contrast experience.
- My development targets are (i) an FPGA based RV32 SoC implementation, (ii) a Sipeed D1 RV64GC board and shortly (iii) a Pine64 Pinetab-V.
- My software targets are: (a) xv6-rv, (b) SysIII, (c) Linux, (d) experiments around SysIII
Linux is for me a secondary target, just for comparison and to see if ideas are “Linux capable”. I’m not overly interested in Arm at the moment.
My ideas are still evolving, but currently more or less along the below lines:
- Boot rom loads SPL, this is custom in each case and set by the SoC's designers.
- SPL initialises DRAM system and loads next stage. Unfortunately, this too would seem to be quite system specific, but the BSP should provide the baseline for this. As BSP’s are often a mess, milage may vary.
- The next stage is a hybrid of BBL, OpenSBI and Virtio. The idea is to provide a standard abstraction layer that all of my software targets can work with. This idea is used for the FPGA target and allows booting a Linux kernel with just the generic Virtio device drivers (so far just disk and console).
- The last layer is the classical OS layer. If I get it right, each OS can run on all h/w targets without customisation.
At the moment I’m playing with USB, and how that might layer into the structure of V7, SysIII or 8th Edition -- and also the above.
> Date: Mon, 10 Apr 2023 18:27:51 +0000
> From: segaloco
> ... or was there no single guiding principle and each machine came up, at that level at least, in a relative vacuum, with only the machine interface to UNIX being the guiding principle?
I stumbled into the same question last year, when doing my SysIII to RV64 port. I managed to turn that into a somewhat chaotic discussion, mixing old and new, and history with ideas. From that chaotic discussion I got the impression that it was indeed mostly ad hoc. In context, hardware was much easier to boot and drive back then -- it probably was not seen as complex enough to warrant much research into layering and abstraction.
Also bear in mind that something like a boot rom only became the norm in the late 70’s. Before that, one keyed in two dozen words with a tiny program to load the first boot stage.
That said, there is an implicit layering in v7 and beyond:
- “low.s" does hardware setup, incl. such stuff as setting up interrupt tables. As this is closely tied to the hardware, it would have been a custom job in each case.
- “mch.s” (later also mch.c) has the basic routines that are hardware dependent (switching stacks, changing priority levels and modes, etc.). It also has emulation for ‘missing’ instructions, such as floating point ops where this is not available in hardware. Same as above, I think. Maybe h/w related memory protection operations should live here as well, but the hardware was still quite divergent in this area in the 70’s and early 80’s.
- low-level device drivers live in the ‘dmr’ or (later) ‘io’ directory. Here there is some standardisation, as all device drivers must conform to the (char/block) device switch APIs. It seems to me that most of these drivers were written by taking one that was similar to what needed to be written and to start from there. Maybe this is still how it works in Linux today.
- To the extent that there is such a thing as 'high-level device drivers’ in early Unix, the structure is less clearly visible. The file system (and there was only one at the time of v7) is placed between the block device switch and the mount table so to speak. This was structured enough that splicing in other file systems seems to have been fairly easy in the early 80’s (the splicing in, not the writing of the file system itself, of course). Starting with 8th edition, the ‘file system switch’ created a clear API for multiple file systems. Arguably, the ‘tty’ subsystem is also a ‘high-level device driver’, but this one lives as custom code together with the serial port device drivers. Also in 8th Edition, ‘streams' were introduced. One could think of this as a structured approach to high-level device drivers for character mode devices, incl. the ’tty’ subsystem.
- I don’t think there was ever anything in early Unix that merged ’streams’ and the 'file system switch' into a single abstraction (but maybe 9P did?).
> Where I'm trying to put this sort of knowledge into use is I'm starting to spec out a kernel bootstrap for the RPi Pico and Pine64 Ox64 boards (ARM32 and RISCV64 respectively) that is not only sufficient to start a V7-ish kernel on each, but that are ultimately based on the same design, varying literally only where the hardware strictly necessitates it, but similar enough that reading the two assembly files side by side yields essentially the exact same discrete operations.
I have a similar interest, but to avoid the same chaos as I created before, I’ll respond to this with a pm.
> Does anyone know of any of the tools, formats, practices, etc. used in producing the actual graphical covers of various published UNIX manuals?
The Bell Labs publication department at Whippany did the physical
design for the bound versions of the Research Unix manual--from v7 as
a trade brook through v10, also a trade book.. They did the cover
designs for v8-v10 in house. I am not sure whether they did the v7
cover, farmed it out, or left it up to Holt Rinehart. Whippany handled
the printing of v8 and v9. Saunders College Publishing did it for v10.
Unfortunately, I do not remember whom I dealt with in Whippany, and my
records of the interactions are long gone.
Doug
Good evening, I'd like to share a listing I've taken of the various extra pages present in the BTL version of the SVR2 User's Manual I picked up a little while ago.
https://pastebin.com/18uTzyfS
Like the Release 5.0 BTL version before it, many of the added pages are DIV 452 standard pages for Writer's Workbench as well as the Basic-16/BELLMAC-4/BELLMAC-8 development environments.
To quote the preface:
"This manual was designed through a cooperative effort of the BTL Computer Centers in Division 452. It represents a collection of nearly all the commands that are running on any Computer Center UNIX machine.
...
The header of each manual page identifies the classification of the command along with any machine or site dependencies.
...
Any page marked LOCAL indicates the sites that are running that command.
...
Pages marked DIV 452 STD are from the collection of Computer Center standard commands, and are available on machines administered by Division 452 Computer Centers. The pages that are designated as INTERIM or 5.0 are those commands which are scheduled to be included in a separate WECo software add-on package."
This manual is just sections 1 and 6, presumably 1m, 7, and 8 are in a corresponding administrator's manual and 2, 3, 4, 5 are in a programmer's manual, making SVR2 the start of the user's manual being further subdivided. I seem to recall one or the other of this same issue of manuals show up on eBay at some point, I'm kicking myself for not springing for it at the time, but hopefully one or the other (or both) turn up again to be documented someday.
Additionally included in the above listing is a list of references from various "SEE ALSO" sections throughout the manual, as well as some other odds and ends from the text. Finally, there is a short listing of teach(1) classes as provided by a couple variants of the application.
If any particular page piques an interest, let me know and I can scan it for you, otherwise this one is a ways away on my scan backlog.
- Matt G.
Good day everyone, I'm in search of a bit of esoteric information regarding published UNIX works. Does anyone know of any of the tools, formats, practices, etc. used in producing the actual graphical covers of various published UNIX manuals?
Some that come to mind:
The alphabet blocks cover of the HRW V7 Manuals
The simple 70's Bell-style cover of the UNIX System III manual
The nice 3B-20 picture on the UNIX 4.1 manual
The grid patterns design on the UNIX System V documentation
The blue "big V" SVR4 manuals (given the time disparity, these could have totally different underpinnings)
Where I'm particularly curious is how these covers were actually set, defined, the image data to print on them stored, formatted, etc. In other words, <???>:troff::covers:manpages where ??? may also represent more than just the specific tools/formats. Anyone have the scoop on the actual raw materials and technologies used for preparing the covers and/or if any of those original assets, in their raw form, would potentially still exist somewhere? To be honest, I am particularly interested in the original, highest fidelity possible image of the 3B-20 from the corresponding manual (https://commons.wikimedia.org/wiki/Category:Unix_Manuals#/media/File:UNIX4.…) but am happy with any info illuminates what went into the actual physical production. Thanks all!
- Matt G.
P.S. If it provides any leads, the closest thing I've found in actual document sources to material related to these aspects of physical publication are the files M.folio and M.tabs here: https://www.tuhs.org/cgi-bin/utree.pl?file=SysIII/usr/src/man/tools
I figure it won't cost me much more than $5 to ship domestically, which
I'll pay for. International is more hassle so let's discuss.
BSTJJuly-August 1978 ("the" issue)
Elements of Programming Style 2nd Ed, Kernighan and Plauger
The UNIX Programming Environment, Kernighan and Pike
The C Programming Language 2nd Ed, Kernighan and Ritchie (includes printout
of errata posted by dmr(a)alice.JUCP "5 Jun 89")
Good day everyone. I'm taking a bit of a break from my documentation stuff and veering back towards some embedded systems work and have the burning question on my mind this morning: Was there any coordination between different groups engaged in porting efforts at Bell regarding machine layer implementations?
In other words, was there any sort of common design of "get a stack pointer, do <XYZ> on the protection hardware, move the binary to address <ABC>, clear bss, etc." that was followed as lore when working up new machine bootstraps, or was that sort of work a bit more siloed? For instance, when working on the VAX port, was the crew more likely stepping through mch replicating things based on what the PDP-11 was doing, was the startup more derived from DEC literature, or was there no single guiding principle and each machine came up, at that level at least, in a relative vacuum, with only the machine interface to UNIX being the guiding principle?
Where I'm trying to put this sort of knowledge into use is I'm starting to spec out a kernel bootstrap for the RPi Pico and Pine64 Ox64 boards (ARM32 and RISCV64 respectively) that is not only sufficient to start a V7-ish kernel on each, but that are ultimately based on the same design, varying literally only where the hardware strictly necessitates it, but similar enough that reading the two assembly files side by side yields essentially the exact same discrete operations. What I don't know is if I'm barking up the wrong tree and it was already settled in the 70s that machines are sufficiently different enough that you can't really just set forth one abstract "machine startup" design that actually includes all those CPU-level concerns such as protection, stack config, context switching, etc. I know even today peering into sources of stuff like Linux and seL4, the "ml" for each seems to have been built by a different person/group rather than someone setting out with a CPU bootstrap design and implementing the same on each chip.
So boiled down to a one liner: Was there a guiding document/design/memoranda for the mch/ml components of UNIX in Bell, or was each one designed more "on-the-fly" as the particulars of the hardware were sorted out?
- Matt G.
Greetings,
What's the canonical source for patches to 2.9BSD and 2.11BSD?
I see we have 2.11BSD patch 469 dated last month in the archive. Where does
it come from? Has anybody climbed the hill to import all the patches into a
git repo? I've found some mirrors, but moe.2bsd.org has been down for me
for ages... How does Warren keep things up to date?
I also have a (maybe faulty) memory of a similar series of patches to
2.9BSD because it was the last BSD to support non-split I&D space machines.
yet a quick google search turns up nothing other than a set of patches
dated August 1985 (also in our archive) and some changes for variants of
hardware (pro, mscp). Is that it?
Warner
Hello,
I received word from someone who went to Case Wester Reserve
Univsersity, and is willing to send early 1970s ephemera to someone
interested in going through it. The description is:
"I've go stuff from my course work done on our Univac 1108/ChiOS system,
program listing, cpu code cards, etc."
Any takers?
Best regards,
Lars Brinkhoff
