12 Oct
2022
12 Oct
'22
7:02 p.m.
I know branch and link was in the 360; was it earlier? And ... anybody know
who invented it?
This came up in a risc-v meeting just now :-) My claim is that if anybody
knows, they will be in this group.
24 Oct
24 Oct
11:46 p.m.
On 12/10/22, ron minnich wrote:
I know branch and link was in the 360; was it earlier?
And ... anybody know
who invented it?
This came up in a risc-v meeting just now :-) My claim is that if anybody
knows, they will be in this group.
The Whirlwind used the A register for this purpose. The jump (sp =
sub-program) and conditional jump (cp = conditional sub-program)
instructions set A to the return address. The first instruction at the
target can then use ta (transfer A to storage) to write to the address
part of the return-sp instruction. It would look like this:
sp foo ; call foo
ret, ... ; come back here
foo, ta foo1 ; store return address
...
foo1, sp . ; will return to ret
Might be earlier than this, I just happen to know the Whirlwind somewhat
well. It's late 40s machine, so you probably won't find anything *much*
older.
Cheers,
aap
25 Oct
25 Oct
8:35 a.m.
On 25/10/22, Angelo Papenhoff wrote:
Might be earlier than this, I just happen to know the
Whirlwind somewhat
well. It's late 40s machine, so you probably won't find anything *much*
older.
Addendum: the original report from 1947 does not describe this behaviour
yet. The change came in oct. 1948. M-668 mentions it and refers to M-647,
which however is not available online.
So the concept of saving the resturn address in another register is at
least as old as oct. 1948, but again I wouldn't be surprised if some
even slightly earlier computer had it too.
aap
5 p.m.
I’ve just spent a fun hour looking at the old Whirlwind documents. I think I agree with
Angelo.
The 1947 block diagrams and time-pulse charts show that the original “SP” (subprogram)
instruction transferred the low 11 bits of the instruction directly to the program
counter. They do not show the old program counter being saved in the AR register, nor is
there yet the “TA” (transfer address) instruction to save the AR register to memory.
Evidently both these new features, which together provide a branch and link function were
likely described in memo M-647, which is not scanned anywhere I can find. It is called
“Some new orders for WWI"
There was already logic for the program counter to drive the bus, and logic to capture the
bus into the AR register, so the modification to SP to save the old program counter was
likely pretty easy: drive the bus from the program counter, and capture it in AR, just by
adding some new diodes to the sequencer.
Adding the Transfer Address instruction was likely also pretty easy, since there was a way
for the AR register to drive the bus.
With the new SP and TA, one would use SP to call a subroutine, and the first instruction
of any subroutine would be TA to save the return address into the final location of the
subroutine. (TA only modified the low 11 bits of the 16 bit location)
Before these instructions, a subroutine call would require one additional memory location,
to hold the return address for each point of call, and one additional instruction, one to
load the return address into the accumulator and one to store it into the code at the end
of the subroutine. (The latter could be the first instruction of the subroutine.)
Originally I thought that maybe David Wheeler invented the Link register, since he’s often
credited with inventing the subroutine, but it looks like the particular thing he did was
the idea of the “Wheeler Jump” where code explicitly stores the return address into the
instruction at the end of the subroutine. That idea was used in Whirlwind as well. EDSAC
I did not have link, but it was proposed for EDSAC II. Whirlwind was likely first to
implement.
On 2022, Oct 25, at 4:35 AM, Angelo Papenhoff
<aap(a)papnet.eu> wrote:
On 25/10/22, Angelo Papenhoff wrote:
Might be earlier than this, I just happen to know
the Whirlwind somewhat
well. It's late 40s machine, so you probably won't find anything *much*
older.
Addendum: the original report from 1947 does not describe this behaviour
yet. The change came in oct. 1948. M-668 mentions it and refers to M-647,
which however is not available online.
So the concept of saving the resturn address in another register is at
least as old as oct. 1948, but again I wouldn't be surprised if some
even slightly earlier computer had it too.
aap 
6:26 p.m.
I agree that sounds pretty conclusive. I knew Wheeler had used his JUMP
with EDSAC, I had been wondering if Wilkes had something in his machine
(EDSAC II) - sounds like it was proposed. But I would not be surprised if
the idea was Wilkes, but Whirlwind implemented it. They all talked to
each other.
With apologies to Tom Lehrer ...
*"And then I write*
*By morning, night,*
*And afternoon,*
*And pretty soon*
*My name in Dnepropetrovsk is cursed, When he finds out I publish first."*
ᐧ
On Tue, Oct 25, 2022 at 1:01 PM Lawrence Stewart <stewart(a)serissa.com>
wrote:
I’ve just spent a fun hour looking at the old
Whirlwind documents. I
think I agree with Angelo.
The 1947 block diagrams and time-pulse charts show that the original “SP”
(subprogram) instruction transferred the low 11 bits of the instruction
directly to the program counter. They do not show the old program counter
being saved in the AR register, nor is there yet the “TA” (transfer
address) instruction to save the AR register to memory.
Evidently both these new features, which together provide a branch and
link function were likely described in memo M-647, which is not scanned
anywhere I can find. It is called “Some new orders for WWI"
There was already logic for the program counter to drive the bus, and
logic to capture the bus into the AR register, so the modification to SP to
save the old program counter was likely pretty easy: drive the bus from the
program counter, and capture it in AR, just by adding some new diodes to
the sequencer.
Adding the Transfer Address instruction was likely also pretty easy, since
there was a way for the AR register to drive the bus.
With the new SP and TA, one would use SP to call a subroutine, and the
first instruction of any subroutine would be TA to save the return address
into the final location of the subroutine. (TA only modified the low 11
bits of the 16 bit location)
Before these instructions, a subroutine call would require one additional
memory location, to hold the return address for each point of call, and one
additional instruction, one to load the return address into the accumulator
and one to store it into the code at the end of the subroutine. (The latter
could be the first instruction of the subroutine.)
Originally I thought that maybe David Wheeler invented the Link register,
since he’s often credited with inventing the subroutine, but it looks like
the particular thing he did was the idea of the “Wheeler Jump” where code
explicitly stores the return address into the instruction at the end of the
subroutine. That idea was used in Whirlwind as well. EDSAC I did not have
link, but it was proposed for EDSAC II. Whirlwind was likely first to
implement.
On 2022, Oct 25, at 4:35 AM, Angelo Papenhoff
<aap(a)papnet.eu> wrote:
On 25/10/22, Angelo Papenhoff wrote:
Might be earlier than this, I just happen to know
the Whirlwind somewhat
well. It's late 40s machine, so you probably won't find anything *much*
older.
Addendum: the original report from 1947 does not describe this behaviour
yet. The change came in oct. 1948. M-668 mentions it and refers to M-647,
which however is not available online.
So the concept of saving the resturn address in another register is at
least as old as oct. 1948, but again I wouldn't be surprised if some
even slightly earlier computer had it too.
aap 
8:05 p.m.
There was a guy at IBM research who had a patent framed on his wall that he
claimed was for indirect addressing. Sadly, I don't remember his name.
I'll ask Peter Capek if he remembers who it was.
On the other hand, I'm now reading a book called "Turing's Cathedral"
that
goes into considerable length talking about what is essentially indirect
addressing in the context of the evolution of the Von Neumann model and its
limitations.
=====
nygeek.net
mindthegapdialogs.com/home <https://www.mindthegapdialogs.com/home>
On Tue, Oct 25, 2022 at 2:27 PM Clem Cole <clemc(a)ccc.com> wrote:
I agree that sounds pretty conclusive. I knew Wheeler
had used his JUMP
with EDSAC, I had been wondering if Wilkes had something in his machine
(EDSAC II) - sounds like it was proposed. But I would not be surprised if
the idea was Wilkes, but Whirlwind implemented it. They all talked to
each other.
With apologies to Tom Lehrer ...
*"And then I write*
*By morning, night,*
*And afternoon,*
*And pretty soon*
*My name in Dnepropetrovsk is cursed, When he finds out I publish first."*
ᐧ
On Tue, Oct 25, 2022 at 1:01 PM Lawrence Stewart <stewart(a)serissa.com>
wrote:
> I’ve just spent a fun hour looking at the old Whirlwind documents. I
> think I agree with Angelo.
>
> The 1947 block diagrams and time-pulse charts show that the original “SP”
> (subprogram) instruction transferred the low 11 bits of the instruction
> directly to the program counter. They do not show the old program counter
> being saved in the AR register, nor is there yet the “TA” (transfer
> address) instruction to save the AR register to memory.
>
> Evidently both these new features, which together provide a branch and
> link function were likely described in memo M-647, which is not scanned
> anywhere I can find. It is called “Some new orders for WWI"
>
> There was already logic for the program counter to drive the bus, and
> logic to capture the bus into the AR register, so the modification to SP to
> save the old program counter was likely pretty easy: drive the bus from the
> program counter, and capture it in AR, just by adding some new diodes to
> the sequencer.
>
> Adding the Transfer Address instruction was likely also pretty easy,
> since there was a way for the AR register to drive the bus.
>
> With the new SP and TA, one would use SP to call a subroutine, and the
> first instruction of any subroutine would be TA to save the return address
> into the final location of the subroutine. (TA only modified the low 11
> bits of the 16 bit location)
>
> Before these instructions, a subroutine call would require one additional
> memory location, to hold the return address for each point of call, and one
> additional instruction, one to load the return address into the accumulator
> and one to store it into the code at the end of the subroutine. (The latter
> could be the first instruction of the subroutine.)
>
> Originally I thought that maybe David Wheeler invented the Link register,
> since he’s often credited with inventing the subroutine, but it looks like
> the particular thing he did was the idea of the “Wheeler Jump” where code
> explicitly stores the return address into the instruction at the end of the
> subroutine. That idea was used in Whirlwind as well. EDSAC I did not have
> link, but it was proposed for EDSAC II. Whirlwind was likely first to
> implement.
>
> > On 2022, Oct 25, at 4:35 AM, Angelo Papenhoff <aap(a)papnet.eu> wrote:
> >
> > On 25/10/22, Angelo Papenhoff wrote:
> >> Might be earlier than this, I just happen to know the Whirlwind
> somewhat
> >> well. It's late 40s machine, so you probably won't find anything
*much*
> >> older.
> >
> > Addendum: the original report from 1947 does not describe this behaviour
> > yet. The change came in oct. 1948. M-668 mentions it and refers to
> M-647,
> > which however is not available online.
> > So the concept of saving the resturn address in another register is at
> > least as old as oct. 1948, but again I wouldn't be surprised if some
> > even slightly earlier computer had it too.
> >
> > aap
>
>
9:03 p.m.
While we are chasing threads of the past, before our esteemed leader stomps on us for not
being Unixy here…
The missing memo was M-649, which is listed in
http://bitsavers.org/pdf/mit/mitre/MITRE_Archive/AC006_WHIRLWIND_I_Computer…
<http://bitsavers.org/pdf/mit/mitre/MITRE_Archive/AC006_WHIRLWIND_I_Computer_Collection_at_Smithsonian.pdf>
as being titled “Some New Orders for WWI” by C. W. Adams and R. P. Mayer.
M-668, the biweekly report from October 29. 1948 says (see scan at end) the order SP
(subprogram) is an old order but has been modified to place the contents of PC in the AR.
Uses of these orders are suggested in the Memo.
According to the description of it in M-669 (Biweekly report part III), the memo was 2
pages.
C. W. Adams is Prof Charles W. Adams, who wrote a couple of non-technical articles
https://dl.acm.org/doi/pdf/10.1145/609784.609795
<https://dl.acm.org/doi/pdf/10.1145/609784.609795> “Small Problems on Large
Computers"
https://dl.acm.org/doi/pdf/10.1145/1455270.1455271
<https://dl.acm.org/doi/pdf/10.1145/1455270.1455271> “Small Computers in a Large
World”
It was interesting to encounter references to J W Salzer and Alan Perlis in the various
documents.
-Larry
E. P. Mayer was evidently an engineer on the Whirlwind probject. He’s mentioned all over
in the context of circuit and block diagrams.
On 2022, Oct 25, at 4:05 PM, Marc Donner
<marc.donner(a)gmail.com> wrote:
There was a guy at IBM research who had a patent framed on his wall that he claimed was
for indirect addressing. Sadly, I don't remember his name. I'll ask Peter
Capek if he remembers who it was.
On the other hand, I'm now reading a book called "Turing's Cathedral"
that goes into considerable length talking about what is essentially indirect addressing
in the context of the evolution of the Von Neumann model and its limitations.
=====
nygeek.net <http://nygeek.net/>
mindthegapdialogs.com/home <https://www.mindthegapdialogs.com/home>
On Tue, Oct 25, 2022 at 2:27 PM Clem Cole <clemc(a)ccc.com
<mailto:clemc@ccc.com>> wrote:
I agree that sounds pretty conclusive. I knew Wheeler had used his JUMP with EDSAC, I had
been wondering if Wilkes had something in his machine (EDSAC II) - sounds like it was
proposed. But I would not be surprised if the idea was Wilkes, but Whirlwind implemented
it. They all talked to each other.
With apologies to Tom Lehrer ...
"And then I write
By morning, night,
And afternoon,
And pretty soon
My name in Dnepropetrovsk is cursed, When he finds out I publish first."
ᐧ
On Tue, Oct 25, 2022 at 1:01 PM Lawrence Stewart <stewart(a)serissa.com
<mailto:stewart@serissa.com>> wrote:
I’ve just spent a fun hour looking at the old Whirlwind documents. I think I agree with
Angelo.
The 1947 block diagrams and time-pulse charts show that the original “SP” (subprogram)
instruction transferred the low 11 bits of the instruction directly to the program
counter. They do not show the old program counter being saved in the AR register, nor is
there yet the “TA” (transfer address) instruction to save the AR register to memory.
Evidently both these new features, which together provide a branch and link function were
likely described in memo M-647, which is not scanned anywhere I can find. It is called
“Some new orders for WWI"
There was already logic for the program counter to drive the bus, and logic to capture
the bus into the AR register, so the modification to SP to save the old program counter
was likely pretty easy: drive the bus from the program counter, and capture it in AR, just
by adding some new diodes to the sequencer.
Adding the Transfer Address instruction was likely also pretty easy, since there was a
way for the AR register to drive the bus.
With the new SP and TA, one would use SP to call a subroutine, and the first instruction
of any subroutine would be TA to save the return address into the final location of the
subroutine. (TA only modified the low 11 bits of the 16 bit location)
Before these instructions, a subroutine call would require one additional memory
location, to hold the return address for each point of call, and one additional
instruction, one to load the return address into the accumulator and one to store it into
the code at the end of the subroutine. (The latter could be the first instruction of the
subroutine.)
Originally I thought that maybe David Wheeler invented the Link register, since he’s
often credited with inventing the subroutine, but it looks like the particular thing he
did was the idea of the “Wheeler Jump” where code explicitly stores the return address
into the instruction at the end of the subroutine. That idea was used in Whirlwind as
well. EDSAC I did not have link, but it was proposed for EDSAC II. Whirlwind was likely
first to implement.
On 2022, Oct 25, at 4:35 AM, Angelo Papenhoff
<aap(a)papnet.eu <mailto:aap@papnet.eu>> wrote:
On 25/10/22, Angelo Papenhoff wrote:
Might be earlier than this, I just happen to know
the Whirlwind somewhat
well. It's late 40s machine, so you probably won't find anything *much*
older.
Addendum: the original report from 1947 does not describe this behaviour
yet. The change came in oct. 1948. M-668 mentions it and refers to M-647,
which however is not available online.
So the concept of saving the resturn address in another register is at
least as old as oct. 1948, but again I wouldn't be surprised if some
even slightly earlier computer had it too.
aap 
26 Oct
26 Oct
4:45 a.m.
Hi Lawrence,
With the new SP and TA, one would use SP to call a
subroutine, and the
first instruction of any subroutine would be TA to save the return
address into the final location of the subroutine. (TA only modified
the low 11 bits of the 16 bit location)
Before these instructions, a subroutine call would require one
additional memory location, to hold the return address for each point
of call, and one additional instruction, one to load the return
address into the accumulator and one to store it into the code at the
end of the subroutine. (The latter could be the first instruction of
the subroutine.)
So before SP and TA, would the ‘latter’ instruction at the start of the
subroutine, which stores the accumulator holding the return address, be
modifying all sixteen bits of the location unlike TA which only modifies
the bottom eleven?
If so, did the accumulator's top bits hold the ‘return’ op-code or was
there another instruction near the subroutine's end which loaded the
11-bit address before a second instruction jumped to it?
--
Cheers, Ralph.
5:29 a.m.
On 26/10/22, Ralph Corderoy wrote:
"Before" sounds a bit misleading. The Whirlwind ran its first actual program
(from test storage, i.e. 27 switch and 5 flip-flop registers) in late 1949,
so the change we're talking about here was early enough that the old way
of doing jumps was only ever theoretical.
Still, there was from the start a td (transfer digits) instruction,
which stores the address bits from AC into the addressed location. ta is
much the same except it stores A.
Before these
instructions, a subroutine call would require one
additional memory location, to hold the return address for each point
of call, and one additional instruction, one to load the return
address into the accumulator and one to store it into the code at the
end of the subroutine. (The latter could be the first instruction of
the subroutine.)
So before SP and TA, would the ‘latter’ instruction at the start of the
subroutine, which stores the accumulator holding the return address, be
modifying all sixteen bits of the location unlike TA which only modifies
the bottom eleven?
If so, did the accumulator's top bits hold the
‘return’ op-code or was
there another instruction near the subroutine's end which loaded the
11-bit address before a second instruction jumped to it?
Without ta, a subroutine jump could be done like this:
ca reta ; load return address
sp foo ; jump to foo
ret, ... ; return here
foo, td foo1 ; store return address
... ; do stuff
foo1, sp . ; return from here
reta, ret
Of course then you lose the possibility of passing some argument in AC.
Cheers,
aap
7:52 a.m.
Peter Capek found this obit of John Griffith. Indirect addressing patent,
for whatever it’s worth.
https://www.legacy.com/us/obituaries/bradenton/name/john-griffith-obituary?…
On Wed, Oct 26, 2022 at 1:29 AM Angelo Papenhoff <aap(a)papnet.eu> wrote:
On 26/10/22, Ralph Corderoy wrote:
"Before" sounds a bit misleading. The Whirlwind ran its first actual
program
(from test storage, i.e. 27 switch and 5 flip-flop registers) in late 1949,
so the change we're talking about here was early enough that the old way
of doing jumps was only ever theoretical.
Still, there was from the start a td (transfer digits) instruction,
which stores the address bits from AC into the addressed location. ta is
much the same except it stores A.
--
=====
nygeek.net
mindthegapdialogs.com/home <https://www.mindthegapdialogs.com/home>
Before
these instructions, a subroutine call would require one
additional memory location, to hold the return address for each point
of call, and one additional instruction, one to load the return
address into the accumulator and one to store it into the code at the
end of the subroutine. (The latter could be the first instruction of
the subroutine.)
So before SP and TA, would the ‘latter’ instruction at the start of the
subroutine, which stores the accumulator holding the return address, be
modifying all sixteen bits of the location unlike TA which only modifies
the bottom eleven? If so, did the accumulator's top bits hold
the ‘return’ op-code or was
there another instruction near the subroutine's end which loaded the
11-bit address before a second instruction jumped to it?
Without ta, a subroutine jump could be done like this:
ca reta ; load return address
sp foo ; jump to foo
ret, ... ; return here
foo, td foo1 ; store return address
... ; do stuff
foo1, sp . ; return from here
reta, ret
Of course then you lose the possibility of passing some argument in AC.
Cheers,
aap
11:12 a.m.
Whirlwind I had a TD (transfer digits) instruction that stored only the low 11 bits from
the accumulator to storage
On Oct 26, 2022, at 12:45 AM, Ralph Corderoy
<ralph(a)inputplus.co.uk> wrote:
Hi Lawrence,
With the new SP and TA, one would use SP to call
a subroutine, and the
first instruction of any subroutine would be TA to save the return
address into the final location of the subroutine. (TA only modified
the low 11 bits of the 16 bit location)
Before these instructions, a subroutine call would require one
additional memory location, to hold the return address for each point
of call, and one additional instruction, one to load the return
address into the accumulator and one to store it into the code at the
end of the subroutine. (The latter could be the first instruction of
the subroutine.)
So before SP and TA, would the ‘latter’ instruction at the start of the
subroutine, which stores the accumulator holding the return address, be
modifying all sixteen bits of the location unlike TA which only modifies
the bottom eleven?
If so, did the accumulator's top bits hold the ‘return’ op-code or was
there another instruction near the subroutine's end which loaded the
11-bit address before a second instruction jumped to it?
--
Cheers, Ralph. 
25 Oct
25 Oct
10:24 p.m.
On Oct 12, 2022, at 12:01 PM, ron minnich <rminnich(a)gmail.com> wrote:
I know branch and link was in the 360; was it earlier? And ... anybody know who invented
it?
This came up in a risc-v meeting just now :-) My claim is that if anybody knows, they
will be in this group.
Zuse Z4 had instructions to jump to a subprogram and back. Unclear if they were in the
original Z4 (1945) or were added later. Or how it was done.
https://cacm.acm.org/blogs/blog-cacm/247521-discovery-user-manual-of-the-ol…
Turing's ACE (1946) computer had BURY and UNBURY that push and pop a
subroutine's return address from a ptr held in TS31. TS1..TS32 were "temporary
storage" registers each in a recirculating memory (mercury delay line?) with a cycle
time of 32µs. The paper referenced below says BURY and UNBURY were subroutines but I
wonder if they were macros.
From the "Turing and ACE, Lessons from a 1946 Computer Design"
<https://cds.cern.ch/record/263304/files/p230.pdf> paper, "Inventing this
concept in late 1945 was a truly amazing achievement, perhaps inspired by the recursive
function theory which Turing had learnt from the work of Church, and by a slight knowledge
of the nineteenth century work of Babbage."
10:41 p.m.
Bakul Shah [26/10/2022 00.24]:
Turing's ACE (1946) computer had BURY and UNBURY
that push and pop a
subroutine's return address from a ptr held in TS31. TS1..TS32 were
"temporary storage" registers each in a recirculating memory (mercury
delay line?) with a cycle time of 32µs. The paper referenced below says
BURY and UNBURY were subroutines but I wonder if they were macros.
Or a gin and tonic delay line, as he (jokingly) suggested as an alternative.
--
Hilsen Harald
10:47 p.m.
Am Tue, Oct 25, 2022 at 03:24:01PM -0700 schrieb Bakul Shah:
On Oct 12, 2022, at 12:01 PM, ron minnich
<rminnich(a)gmail.com> wrote:
The Z4's programs were stored on a number of tapes. Initially, there
was only one tape reader and no branch instructions. Later, the design
was modified by adding additional tape readers and instructions to
switch to a different tape reader. Thus, sub programs can be realised
by storing the subprogram on a different, possibly looped, tape and then
switching to the other tape reader when the sub program is called. The
subprogram's final instruction would switch back to the main tape
reader. So not quite a link register.
An instruction set reference for a later (1950) model can be found in the
ETH Zurich library:
https://www.e-manuscripta.ch/zut/doi/10.7891/e-manuscripta-98601
Yours,
Robert Clausecker
--
() ascii ribbon campaign - for an 8-bit clean world
/\ - against html email - against proprietary attachments
I know branch and link was in the 360; was it earlier? And ... anybody
know who invented it?
This came up in a risc-v meeting just now :-) My claim is that if anybody
knows, they will be in this group.
Zuse Z4 had instructions to jump to a subprogram and back. Unclear if
they were in the original Z4 (1945) or were added later. Or how it was done.
547
days inactive
561
days old
13 comments
10 participants
participants (10)
-
Angelo Papenhoff -
Bakul Shah -
Clem Cole -
Harald Arnesen -
Larry Stewart -
Lawrence Stewart
-
Marc Donner -
Ralph Corderoy -
Robert Clausecker -
ron minnich