30 Jun
2016
30 Jun
'16
10:17 p.m.
On 2016-06-30 21:22, Clem Cole <clemc(a)ccc.com> wrote:
but when Moto came out with a memory management chip it had some
Clem, I think pretty much all you are writing is correct, except that I
don't get your reference to the PDP-11 MMU.
The MMU of the PDP-11 is not some base/limit register thing. It's a
paged memory, with a flat address space. Admittedly, you only have 8
pages, but I think it's just plain incorrect to call it something else.
(Even though noone I know of ever wrote a demand-paged memory system for
a PDP-11, there is no technical reason preventing you from doing it.
Just that with 8 pages, and load more physical memory than virtual, it
just didn't give much of any benifits.)
Johnny
--
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: bqt(a)softjar.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
> severe flaws that made paging and fault
recovery impossible, while the
> equivalent features available on the 8086 line were tolerable.
Different
issues...
When the 68000 came out there was a base/limit register chip available,
who's number I forget (Moto offered to Apple for no additional cost if they
would use it in the Mac but sadly they did not). This chip was similar
to the 11/70 MMU, as that's what Les and Nick were used to using (they used
a 11/70 running Unix V6 has the development box and had been before the
what would become the 68000 -- another set of great stories from Les, Nick
and Tom Gunter).